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參數(shù)資料
| 型號： | RD-19230FX-302T |
| 元件分類： | ADC |
| 英文描述： | Resolver-to-Digital Converter |
| 中文描述： | 分解器數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大小： | 152K |
| 代理商： | RD-19230FX-302T |
3
Data Device Corporation
www.ddc-web.com
RD-19230
THEORY OF OPERATION
The RD-19230 is a mixed signal CMOS IC containing analog
input and digital output sections. Precision analog circuitry is
merged with digital logic to form a complete high-performance
tracking resolver-to-digital converter. For user flexibility and con-
venience, the converter bandwidth, dynamics, and velocity scal-
ing are externally set with passive components.
FIGURE 1 is the Functional Block Diagram of RD-19230. The
analog conversion electronics require ±5 VDC power supplies,
and the converter contains a charge pump to provide the user
with the option of a single-ended +5 VDC supply. The converter
front-end consists of differential sine and cosine input amplifiers
which are protected up to ±25 V with 2 k
resistors and diode
clamps to the ±5 VDC supplies. By performing the following
trigonometric identity, SIN
θ(
COS
φ)
- COS
θ(
SIN
φ)
= SIN(
θ
-
φ
),
the Control Transformer (CT) compares the analog input signals
(
θ
) with the digital output (
φ )
, resulting in an error signal pro-
portional to the sin of the angular difference. The CT uses a
combination of amplifiers, switches, logic and capacitors in pre-
cision ratios to perform the calculation.
Note:The error output of the CT is normally sinusoidal, but
in LVDT mode, it is triangular (linear) and can be used to
convert any linear transducer output.
The converter accuracy is limited by the precision of the com-
puting elements in the CT.
Instead of a traditional precision
resistor network, this converter uses capacitors with precisely
controlled ratios.
Sampling techniques are used to eliminate
errors due to voltage drift and op-amp offsets.
The error processing is performed using the industry standard
technique for Type II tracking converters. The DC error is inte-
grated yielding a velocity voltage which in turn drives a voltage
controlled oscillator (VCO). This VCO is an incremental integra-
tor (constant voltage input to position rate output) which, togeth-
er with the velocity integrator, forms a Type II servo feedback
loop. A lead in the frequency response is introduced to stabilize
the loop and another lag at higher frequency is introduced to
reduce the gain and ripple at the carrier frequency and above.
The settings of the various error processor gains and break fre-
quencies are done with external resistors and capacitors so that
the converter loop dynamics can be easily controlled by the user.
GAIN
11 mV/LSB
16 BIT
UP/DOWN
COUNTER
R
VCO
R
V
R
B C
C /10
VEL
-VCO
H = 1
VEL SJ1
VEL
C F
CT
+
-
RESOLVER
INPUT
(
θ
)
50 pf
C
VCO
DIGITAL
OUTPUT
(
φ
)
DEMOD
±1.25 V
THRESHOLD
1
FIGURE 2.TRANSFER FUNCTION BLOCK DIAGRAM #1
TABLE 1 notes:
1. Unused data bits are set to logic
“
0.
”
2. In LVDT mode, Bit 3 is the MSB and resolution is
programmable to 8,10, 12, and 14 bits.
3. Accuracy in LVDT mode is 0.15% + 1 LSB of full scale.
4. In the frequency range of 47Hz to 1kHz, there will be
1 LSB of jitter at quadrant boundaries.
5.The maximum phase shift tolerance will degrade linearly
from 45 degrees at 400 Hz to 30 degrees at 60 Hz.
6. When using the -5V inverter, the V
DD
supply current will
double and V
SSP
can be up to 20% low, or -4V.
7. || = in parallel with.
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| RD-19230FX-303T | Resolver-to-Digital Converter |
| RD-19230NEW | Resolver and Synchro To Digital Converters |
| RD-19230F-202T | Converter |
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| RD-19230NEW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Resolver and Synchro To Digital Converters |
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