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RC5051
PRODUCT SPECIFICATION
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The traces that run from the RC5051 IFB (pin 4) and VFB
(pin 5) pins should be run together next to each other and
Kelvin connected to the sense resistor. Running these
lines together rejects some of the common mode noise
that is presented to the RC5051 feedback input. Try, as
much as possible, to run the noisy switching signals
(HIDRV, LODRV & VCCQP) on one layer, but use the
inner layers for power and ground only. If the top layer is
being used to route all of the noisy switching signals, use
the bottom layer to route the analog sensing sign VFB and
IFB.
A PC Board Layout Checklist is available from Fairchild
Applications. Ask for Application Bulletin AB-11.
PC Motherboard Sample Layout and Gerber
File
A reference design for motherboard implementation of the
RC5051 along with the PCAD layout Gerber file and silk
screen can be obtained from our marketing department at
650-968-9211 x 7833.
RC5051 Evaluation Board
Fairchild Semiconductor provides an evaluation board to
verify the system level performance of the RC5051. It serves
as a guide to performance expectations when using the sup-
plied external components and PCB layout. Please call the
marketing department at 650-968-9211 x 7833 for an evalua-
tion board.
Additional Information
For additional information contact the Fairchild
Semiconductor’s Analog & Mixed Signal Products Group
Marketing Department at 650-968-9211 x 7833.