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RC5052
17
P
Output Enable/Soft Start (ENABLE/SS)
The RC5052 will accept an open collector/TTL signal for con-
trolling the output voltage. The low state disables the output
voltage. When disabled, the PWRGD output is in the low state.
Even if an enable is not required in the circuit, this pin
should have attached a capacitor (typically 100nF) to soft-
start the switching.
Over-Voltage Protection
The RC5052 constantly monitors the output voltage for protec-
tion against over-voltage conditions. If the voltage at the VFB
pin exceeds the selected program voltage, an over-voltage
condition is assumed and the RC5052 disables the output
drive signal to the external high-side MOSFET, and drives
the OVP pin high. This is designed to drive the gate of an
external SCR, which blows a fuse, disconnecting the short
from the power bus.
Oscillator
The RC5052 oscillator free runs at 300 kHz, and may be
adjusted from 80KHz to 1MHz as desired. Higher frequensies
will permit smaller components, while decreasing efficiency.
A typical operating frequency is 300KHz. The frequency
may be adjusted upwith a resistor to ground on pin 1, accord-
ing to the formula:
and may be adjusted down with aresistor to 5V on pin 1,
according to the formula:
Dead Time
The RC5052 can control the deadtime, that is, the time
between when the high-side MOSFET is turned off and the
low-side MOSFET is turned on, and vice versa. Longer dead
times are appropriate when using multiple MOSFETs in par-
allel, or when MOSFETs with larger gate capacitance are
used. The dead time may be adjusted with a resistor to
ground on pin 15, according to the formula:
Design Considerations and Component
Selection
Additional information on design and component selection
may be found in Fairchild’s Application Note 57.
MOSFET Selection
This application requires N-channel Logic Level Enhance-
ment Mode Field Effect Transistors. Desired characteristics
are as follows:
¥ Low Static Drain-Source On-Resistance,
R
DS,ON
< 20m
(lower is better)
¥ Low gate drive voltage, V
GS
= 4.5V rated
¥ Power package with low Thermal Resistance
¥ Drain-Source voltage rating > 15V.
The on-resistance (RDS,ON) is the primary parameter for
MOSFET selection. The on-resistance determines the power
dissipation within the MOSFET and therefore significantly
affects the efficiency of the DC-DC Converter. For details
and a spreadsheet on MOSFET selection, refer to Applica-
tions Bulletin AB-8.
Inductor Selection
Choosing the value of the inductor is a tradeoff between
allowable ripple voltage and required transient response. The
system designer can choose any value within the allowed
minimum to maximum range in order to either minimize rip-
ple or maximize transient performance. The first order equa-
tion (close approximation) for minimum inductance is:
where:
V
in
= Input Power Supply
V
out
= Output Voltage
f = DC/DC converter switching frequency
ESR = Equivalent series resistance of all output capacitors in
parallel
V
ripple
= Maximum peak to peak output ripple voltage budget.
The first order equation for maximum allowed inductance is:
where:
C
o
= The total output capacitance
I
pp
= Maximum to minimum load transient current
V
tb
= The output voltage tolerance budget allocated to load
transient
f
40K
R
OSC
=
300kHz*
f
160K
R
OSC
=
300kHz* 1-
T
DT
80K
R
DTA
=
100nsec*
L
min
(Vin – V
out
)
f
x
V
out
V
in
x
ESR
V
ripple
=
L
max
(Vin – V
out
) D
m
V
tb
I
pp2
=
2C
0