參數(shù)資料
型號(hào): R5F56218BDLD#U0
廠商: Renesas Electronics America
文件頁數(shù): 3/148頁
文件大?。?/td> 0K
描述: MCU 32BIT FLASH 512K ROM 85TFLGA
產(chǎn)品培訓(xùn)模塊: RX USB Peripheral
CAN Peripheral and API
RX 12-Bit ADC
RX Bus State Controller
RX Low Voltage Detection and Reset Sources
RX Watchdog Timer
RX 10-Bit ADC
RX 10-Bit DAC
RX Core
RX Compare Match Timer
RX DMAC
特色產(chǎn)品: RX600 Series Microcontrollers
標(biāo)準(zhǔn)包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,SCI,SPI,USB
外圍設(shè)備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 58
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10/12b,D/A 1x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 85-TFLGA
包裝: 托盤
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 98
2004 Microchip Technology Inc.
9.4
IPR Registers
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are three Peripheral
Interrupt Priority Registers (IPR1, IPR2 and IPR3). The
operation of the priority bits requires that the Interrupt
Priority Enable (IPEN) bit be set.
REGISTER 9-10:
IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
R/W-1
PSPIP(1)
ADIP
RC1IP
TX1IP
SSPIP
CCP1IP
TMR2IP
TMR1IP
bit 7
bit 0
bit 7
PSPIP: Parallel Slave Port Read/Write Interrupt Priority bit(1)
1
= High priority
0
= Low priority
bit 6
ADIP: A/D Converter Interrupt Priority bit
1
= High priority
0
= Low priority
bit 5
RC1IP: USART1 Receive Interrupt Priority bit
1
= High priority
0
= Low priority
bit 4
TX1IP: USART1 Transmit Interrupt Priority bit
1
= High priority
0
= Low priority
bit 3
SSPIP: Master Synchronous Serial Port Interrupt Priority bit
1
= High priority
0
= Low priority
bit 2
CCP1IP: CCP1 Interrupt Priority bit
1
= High priority
0
= Low priority
bit 1
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1
= High priority
0
= Low priority
bit 0
TMR1IP: TMR1 Overflow Interrupt Priority bit
1
= High priority
0
= Low priority
Note 1: Enabled only in Microcontroller mode for PIC18F8X20 devices.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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