
R3111x
TIMING CHART
10
Detector Threshold
Hysteresis
t
PLH
t
PLH
t
PLH
GND
GND
V
DDL
-
V
DET
+V
DET
Detector Threshold
Released Voltage
Minimum Operating Voltage
Pull-up Voltage
Supply
Voltage
(V
DD
)
Output
Voltage
(V
OUT
)
R3111xxxxA
R3111xxxxB
R3111xxxxC
Detector Threshold
Hysteresis
Detector Threshold
Hysteresis
DEFINITION OF OUTPUT DELAY TIME
Output Delay Time (t
PLH
) is defined as follows:
1. In the case of Nch Open Drain Output:(R3111xxxxA/B)
Under the condition of the output pin (OUT) is pulled up through a resistor of 470k
to 5V, the time interval
between the rising edge of V
DD
pulse from 0.7V to (
+
V
DET
)
+
2.0V and becoming of the output voltage to 2.5V.
2. In the case of CMOS Output:(R3111xxxxC)
The time interval between the rising edge of V
DD
pulse from 0.7V to (
+
V
DET
)
+
2.0V and becoming of the output
voltage to ((
+
V
DET
)
+
2.0V)
/
2.
+
V
DET
+
2.0V
Supply
Voltage
(V
DD
)
GND
5.0V
5.0V
0.7V
2.5V
GND
Output
Voltage
(V
OUT
)
t
PLH
t
PHL
+
V
DET
+
2.0V
Supply
Voltage
(V
DD
)
0.7V
GND
2.5V
GND
t
PLH
t
PHL
Output
Voltage
(V
OUT
)
+
V
DET
+
2.0V
Supply
Voltage
(V
DD
)
0.7V
GND
GND
t
PLH
t
PHL
+
V
DET
+
2.0V
+
V
DET
+
2.0V
2
Output
Voltage
(V
OUT
)
Nch Open Drain Output
(R3111xxxxA)
Nch Open Drain Output
(R3111xxxxB)
CMOS Output
(R3111xxxxC)