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參數(shù)資料
| 型號(hào)： | R1280D002C-TR |
| 文件頁(yè)數(shù)： | 24/26頁(yè) |
| 文件大?。?/td> | 344K |
| 代理商： | R1280D002C-TR |
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Rev.1.10 - 24 -
External Components
Inductor L1,2: 6.8
μ
H, LDR655312T(TDK)
Diode: FS1J3 (Origin Electronics)
NMOS: IR7601 (International Rectifier)
PMOS: Si3443 (Siliconix)
Resistors: R1, R2, R3, R4 for Setting Output Voltage. Recommendation values are R1+R2
≤
100k
or R3+R4
≤
100k
R5=43k
, R6=10k
Capacitors: Ceramic Capacitor
(Example)
C1=C2=10
μ
F, C3=4.7
μ
F, C4=0.33
μ
F, C5=0.33
μ
F, C6=120pF, C7=50pF, C8=1
μ
F
Note: Maximum voltage tolerance of each component should be considered. With the transistor shown above is
appropriate to set up to
±
15V as output voltage.
I
APPLICATION EXAMPLE
G
R1280D002A/C
L1
NMOS
EXT1
EXT2
GNDV
IN
AMPOUT1
Vrefout
DTC1
DTC2
V
FB1
V
FB2
R1
R2
C1
PMOS
C8
R3
R4
C3
L2
C2
C9
C4
R11
R10
C6
VOUT1
VOUT2
R7
R8
R5
C5
R9
Diode
VOUT3
C10
C11
C7
R6
External Components
Inductor L1,2: 6.8
μ
H, LDR655312T(TDK) for A version, 22
μ
H for R1280D002C
Diode: FS1J3 (Origin Electronics)
NMOS: IR7601 (International Rectifier)
PMOS: Si3443 (Siliconix)
Resistors: R1, R2, R3, R4 for Setting Output Voltage. Recommendation values are R1+R2
≤
100k
or R3+R4
≤
100k
R5=43k
, R6=10k
, R7=R9=22k
, R8=R10=43k
, R11=220k
Capacitors: Ceramic Capacitor
(Example)
R1280D002A: C1=C2=10
μ
F, C3=4.7
μ
F, C4=0.22
μ
F, 5=0.47
μ
F,C6=120pF,C7=50pF,C8=C10=C11=1
μ
F,C9=1000pF
R1280D002C:C1=C2=10
μ
F,C3=4.7
μ
F, C4=0.22
μ
F,C5=0.47
μ
F,C6=220pF,C7=330pF,C8=C10=C11=1
μ
F,C9=1000pF
This IC can be used 3 Output TFT Bias Circuit as shown above. V
OUT3
=2
×
V
OUT1
-Vf
Note: Maximum voltage tolerance of each component should be considered. With the transistor shown above is
appropriate to set up to +15V as V
OUT1
, -15V as V
OUT2,
30V as V
OUT3.
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