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參數(shù)資料
| 型號(hào)： | R1224N332F-TL |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.05 A SWITCHING CONTROLLER, 600 kHz SWITCHING FREQ-MAX, PDSO5 |
| 封裝： | SOT-23, 5 PIN |
| 文件頁(yè)數(shù)： | 10/11頁(yè) |
| 文件大?。?/td> | 153K |
| 代理商： | R1224N332F-TL |
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Rev. 0.06
- 8 -
q
Use capacitors with a capacity of 22
F or more for VOUT pin, and with good high frequency characteristics such as
tantalum capacitors. We recommend you to use output capacitors with an allowable voltage at least twice as much as
setting output voltage. This is because there may be a case where a spike-shaped high voltage is generated by an
inductor when an external transistor is on and off.
q
Choose an inductor that has sufficiently small D.C. resistance and large allowable current and is hard to reach
magnetic saturation. And if the value of inductance of an inductor is extremely small, the ILX may exceed the absolute
maximum rating at the maximum loading.
Use an inductor with appropriate inductance.
q
Use a diode of a Schottky type with high switching speed, and also pay attention to its current capacity.
q
Do not use this IC under the condition with VIN voltage at equal or less than minimum operating voltage.
The performance of power source circuits using these ICs extremely depends upon the peripheral circuits.
Pay attention in the selection of the peripheral circuits. In particular, design the peripheral circuits in a way that the
values such as voltage, current, and power of each component, PCB patterns and the IC do not exceed their
respected rated values.
s How to Adjust Output Voltage and about Phase Compensation
As for Adjustable Output type, feedback pin (VFB) voltage is controlled to maintain 1.0V.
Output Voltage, VOUT is as following equation:
VOUT: R2+R4=VFB: R2
VOUT=VFB
×(R2+R4)/R2
Thus, with changing the value of R2 and R4, output voltage can be set in the specified range.
In the DC/DC converter, with the load current and external components such as L and C, phase might be behind 180
degree. In this case, the phase margin of the system will be less and stability will be worse. To prevent this, phase
margin should be secured with proceeding the phase. A pole is formed with external components L and C3.
Fpole
1/2π√L×C3
A zero (signal back to zero) is formed with R4 and C4.
Fzero1/(2π×R4×C4)
For example, if L=27
H, C3=47F, the cut off frequency of the pole is approximately 4.5kHz.
To make the cut off frequency of the pole as much as 4.5kHz, set R4=33k
and C4=1000pF.
If VOUT is set at 2.5V, R2=22k
is appropriate.
R3 prevents feedback of the noise to VFB pin, about 2.7k
is appropriate value.
C3
C2
L
C1
R1
SD
VFB
VIN
CE
CE CONTROL
LOAD
EXT
GND
C4
R2
R4
R3
PMOS
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