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參數(shù)資料
| 型號(hào)： | QPO-2L |
| 廠商： | Vicor Corporation |
| 元件分類： | DC/DC變換器 |
| 英文描述： | QPO-2L Low Voltage Output Ripple Attenuator |
| 中文描述： | QPO - 2公升低電壓輸出紋波衰減 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 290K |
| 代理商： | QPO-2L |
Picor Corporation www.picorpower.com
QPO-2L Data Sheet Rev. 1.1 Page 7 of 12
The output voltage drop for a given supply during a
transient load step will be reduced at the output of
the QPO-2, effectively multiplying the CIN
capacitance by the ratio of VIN/VOUT which is
typically greater than a factor of 10.
The line inductance from the output of the QPO-2 to
the load should be minimized. This inductance will
cause voltage spikes and ringing proportional to the
inductance and the rate of change in the transient
load current. This effect is outside the control of the
QPO-2 and may require low ESR capacitance placed
at the switching load when long lines exists between
the QPO-2 output and reference ground and load.
The rate of load change should be less than 1 Amp
per microsecond to minimize excessive voltage
ringing during the di/dt. The line inductance
between the power supply output and QPO input
should also follow low inductance layout practices.
The user must be aware of the converter’s over-
voltage set point and not create a headroom voltage
that will cause a shutdown condition. For this reason
it is recommended that the QPO-2 be used with
power supplies running at the factory pre-set
voltages or in a trimmed down configuration.
SC/Trim Adjustment
The RSC resistor is tied between QPOOUT and SC SET
pin and controls the correction current used to trim
the converter to compensate for the headroom
voltage.
The value for the SC SET resistor is
calculated by the following equation:
where; RSC is SC SET resistor value,
RIN is the input resistance of the SC or TRIM
input of the converter (4)
VOUT is the desired QPO output voltage,
VRPT is the pre-trimmed reference of the SC
or TRIM.
This feature can be used in conjunction with an
initially trimmed down supply.
Note 4: When applicable consider the equivalent
impedance of the SC/Trim pin after a trimmed down
adjustment has been made to the supply. Use the
power supply manufacturer’s trim down procedure
by connecting a resistor from the SC/Trim pin to
ground.
The active loop performance of the QPO-2 has been
optimized to provide adequate phase margin over a
worse case load impedance range. Loading the QPO-
2 directly with low ESR ceramic capacitance however
will significantly reduce the phase margin and is not
recommended. The effects of the typical distributed
inductance of the load path will mitigate the
reduction in phase margin when low ESR ceramic
capacitors are dispersed about the load path.
Tantalum and Electrolytic capacitors are higher ESR
components and are not a concern for phase
margin.
When using the QPO as shown in figure 4 the CSC
capacitor creates a soft starting of the headroom
correction current being sourced into the SC/Trim
input of the converter, preventing the output from
tripping the over voltage function while the QPO-2
output reaches regulation. The QPO-2 ramp up time
is typically 5 to 10 milliseconds. The CSC value will be
supply dependent but is typically around 1 to 10F.
The RSL resistor provides a means to isolate the
SC/Trim pin of the converter from CSC as well as limit
the correction current to a level below what will
cause an OVP trip condition during start up. The
compliance of the SC output current source is QPOIN
plus 10 volts so the RSL formula below can be used
to limit the worst-case correction current below the
maximum trim up specification of the converter
being used. Note the correction current set by RSC
must always be lower than the ISCMAX current after
the start-up settling time interval for proper
headroom correction.
RSC =
R IN * VOUT
VRPT
RSL =
QPOIN + 10V
ISCMAX
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