參數(shù)資料
型號: QLX111RIQSR
廠商: INTERSIL CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: SPECIALTY TELECOM CIRCUIT, PQCC16
封裝: 3 X 3 MM, ROHS COMPLIANT, PLASTIC, QFN-16
文件頁數(shù): 2/10頁
文件大?。?/td> 462K
代理商: QLX111RIQSR
2
FN6987.0
October 26, 2009
Pin Configuration
QLx111GRx
(16 LD QFN)
TOP VIEW
Ordering I nformation
PART NUMBER
( Note)
PART MARKI NG
TEMP. RANGE
( °C)
PACKAGE
( Pb-Free)
PKG. DW G. #
QLX111RIQT7
QL111
0 to + 70
16 Ld QFN
7” Prod. Tape & Reel; Qty 1,000
L16.3x3B
QLX111RIQSR
QL111
0 to + 70
16 Ld QFN
7” Sample Reel; Qty 100
L16.3x3B
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb
and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
3
4
15
V
DD
IN[P]
IN[N]
V
DD
G
D
L
G
16
14
13
2
12
10
9
11
6
5
7
8
V
DD
OUT[P]
OUT[N]
V
DD
G
C
C
G
Pin Descriptions
PI N NAME
PI N
NUMBER
DESCRI PTI ON
V
DD
1, 4, 12, 9
Power supply. 1.2V supply voltage. The use of parallel 100pF and 10nF decoupling capacitors to
ground is recommended for each of these pins for broad high-frequency noise suppression.
IN[P,N]
2, 3
Equalizer 1 differential input, CML. The use of 100nF low ESL/ESR MLCC capacitor with at least
6GHz frequency response is recommended.
CP[A,B]
6, 7
Control pins for setting the equalizer. CMOS logic inputs. Pins are read as a 2-digit number to set
the boost level. Pins are internally pulled up and down through a 23k
Ω
resistor.
OUT[P,N]
11, 10
Equalizer differential output, CML. The use of 100nF low ESL/ESR MLCC capacitor with at least
6GHz frequency response is recommended.
LOS
14
LOS indicator. High output when equalized In signal is below DT threshold. Open drain output
internally pulled up to V
DD
with a 10k
Ω
resistor.
DT
15
Detection Threshold. Reference DC voltage threshold for input signal power detection. Data output
OUT is muted when the power of the equalized version of IN falls below the threshold. Tie to ground
to disable electrical idle preservation and always enable the limiting amplifier.
GND
5, 8, 13, 16
Ground
QLx111GRx
相關(guān)PDF資料
PDF描述
QLX111RIQT7 SPECIALTY TELECOM CIRCUIT, PQCC16
QM10TE-H 10 A, 6 CHANNEL, NPN, Si, POWER TRANSISTOR
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QM15TB-24 15 A, 6 CHANNEL, NPN, Si, POWER TRANSISTOR
QM140R9M-25 60 MHz, OTHER CLOCK GENERATOR, PDIP14
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