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參數(shù)資料
| 型號(hào)： | QL6500 |
| 廠商： | QuickLogic Corp. |
| 英文描述： | Eclipse Family Combining Performance, Density, and Embedded RAM(Eclipse 系列性能、密度和嵌入式相結(jié)合的RAM) |
| 中文描述： | Eclipse的家庭結(jié)合性能，密度，和嵌入式內(nèi)存（Eclipse的系列性能，密度和嵌入式相結(jié)合的內(nèi)存） |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 258K |
| 代理商： | QL6500 |
5-8
Preliminary
Eclipse
registers will increase a device
’
s register count. The
addition of an output register will also decrease the
Tco. Since the output register does not need to drive
the routing the length of the output path is also
reduced.
Extra registers add more inputs and outputs to the I/
O structure. Extra routing resources are added to
connect the I/O structure to the other parts of the
device.
I/O interface support is programmable on a per bank
basis. There are 8 I/O banks per chip. Users can
not mix 2.5v I/O with 3.3v I/O on the same I/O
bank. Figure 5 illustrates the I/O bank configura-
tions.
Each I/O bank is independent of other I/O bank and
each I/O bank has it
’
s own VCCIO and VREF sup-
plies. A mixture of different I/O standards can be
used on the device, however there is a limitation as to
which I/O standards can be supported within a given
bank. Differential I/O can be shared with non differ-
ential I/O. There can only be one VREF and one
VCCIO per bank.
FIGURE 8. Multiple I/O Banks
Programmable Slew Rate
Each I/O has programmable slew rate capability. The
rate is programmable to one of two slew rates either
fast or slow. The slower rate can be used to reduce
ground bounce noise. The slow slew rate is 1 V/ns
under typical conditions. The fast slew rate will be
2.8 V/ns
Condition: 2.5V, 25C
TABLE 4. Programmable Slew Rate
Programmable Weak Pull-Down
Programmable weak-pull down resistor is available on
each I/O. I/O Weak Pull-Down eliminates the need
for external pull down resistor for used I/O. The
spec for pull-down current is maximum of 150uA
under worst case condition. - 148uA @ 3.6V, -55C,
- 69 uA@ 2.5V, 25C.
FIGURE 9. I/O Weak Pull-Down
I/O Bank 0
I/O Bank 1
I/O Bank 4
I/O Bank 5
I
I
I
I
VCCIO 0
VCCIO 1
VCCIO 5
VCCIO 4
VCCIO 7
VCCIO 6
VCCIO 2
VCCIO 3
VREF 0
VREF 1
VREF 5
VREF 4
VREF 7
VREF 6
VREF 2
VREF 3
VCCIO = 3.3V
Rising Edge
Falling Edge
Fast Slew
2.8 V/nS
2.86 V/nS
Slow Slew
1.0 V/vS
1.0 V/nS
VCCIO = 2.5V
Rising Edge
Falling Edge
Fast Slew
1.7 V/nS
1.9 V/nS
Slow Slew
0.6 V/vS
0.6 V/nS
P
ROGRAMMABLE
S
LEW
R
ATE
P
ROGRAMMABLE
W
EAK
P
ULL
-D
OWN
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