參數(shù)資料
型號(hào)： Q67127-C2030
廠商： SIEMENS AG
元件分類(lèi)： 8位微控制器
英文描述： 8-Bit CMOS Microcontroller
中文描述： 8位CMOS微控制器
文件頁(yè)數(shù)： 23/48頁(yè)
文件大?。?/td> 319K
代理商： Q67127-C2030
Semiconductor Group
23
1997-04-01
C501
A low-priority interrupt can itself be interrupted by a high-priority interrupt, but not by another low-
priority interrupt. A high-priority interrupt cannot be interrupted by any other interrupt source.
If two requests of different priority level are received simultaneously, the request of higher priority is
serviced. If requests of the same priority are received simultaneously, an internal polling sequence
determines which request is serviced. Thus within each priority level there is a second priority
structure determined by the polling sequence as shown in
table 9
.
Table 8
Interrupt Sources and their Corresponding Interrupt Vectors
Source (Request Flags)
IE0
TF0
IE1
TF1
RI + TI
TF2 + EXF2
Vector
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial port interrupt
Timer 2 interrupt
Vector Address
0003H
000BH
0013H
001BH
0023H
002BH
Table 9
Interrupt Priority-Within-Level
Interrupt Source
Priority
External Interrupt 0,
Timer 0 Interrupt,
External Interrupt 1,
Timer 1 Interrupt,
Serial Channel,
Timer 2 Interrupt,
IE0
TF0
IE1
TF1
RI + TI
TF2 + EXF2
High
↓
Low
相關(guān)PDF資料
PDF描述
Q67127-C2020 High Speed CMOS Logic Hex Buffers/Line Drivers with Inverting 3-State Outputs 16-SOIC -55 to 125
Q67127-C2029 High Speed CMOS Logic Hex Buffers/Line Drivers with Inverting 3-State Outputs 16-SOIC -55 to 125
Q67127-C2056 High Speed CMOS Logic Hex Buffers/Line Drivers with Inverting 3-State Outputs 16-SOIC -55 to 125
Q67127-C2057 High Speed CMOS Logic Hex Buffers/Line Drivers with Inverting 3-State Outputs 16-SOIC -55 to 125
Q67127-C2058 High Speed CMOS Logic Hex Buffers/Line Drivers with Inverting 3-State Outputs 16-SOIC -55 to 125
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