參數(shù)資料
型號: Q67121-C1069
廠商: SIEMENS AG
元件分類: 8位微控制器
英文描述: 8-Bit CMOS Microcontroller
中文描述: 8位CMOS微控制器
文件頁數(shù): 60/69頁
文件大?。?/td> 1124K
代理商: Q67121-C1069
C515C
Semiconductor Group
60
1997-07-01
AC Characteristics
V
CC
= 5 V + 10%, – 15%;
V
SS
= 0 V
T
A
= 0 to 70
°
C
T
A
= – 40 to 85
°
C
T
A
= – 40 to 110
°
C
for the SAB-C515C-8R
for the SAF-C515C-8R
for the SAH-C515C-8R
(
C
L
for port 0, ALE and PSEN outputs = 100 pF;
C
L
for all other outputs = 80 pF)
Program Memory Characteristics
*)
Interfacing the C515C to devices with float times up to 35 ns is permissible. This limited bus contention will not
cause any damage to port 0 drivers.
Parameter
Symbol
Limit Values
Unit
10-MHz clock
Duty Cycle
0.4 to 0.6
Variable Clock
1/CLP = 2 MHz to
10 MHz
min.
max.
min.
max.
ALE pulse width
t
LHLL
t
AVLL
t
LLAX
t
LLIV
t
LLPL
t
PLPH
60
CLP - 40
ns
Address setup to ALE
15
TCL
Hmin
-25 –
TCL
Hmin
-25 –
ns
Address hold after ALE
15
ns
ALE to valid instruction in
113
2 CLP - 87
ns
ALE to PSEN
20
TCL
Lmin
-20
CLP+
TCL
Hmin
-30
ns
PSEN pulse width
115
ns
PSEN to valid instruction in
t
PLIV
75
CLP+
TCL
Hmin
- 65
ns
Input instruction hold after PSEN
t
PXIX
t
PXIZ
*)
t
PXAV
*)
t
AVIV
0
0
ns
Input instruction float after PSEN
30
TCL
Lmin
-10
ns
Address valid after PSEN
35
TCL
Lmin
- 5
ns
Address to valid instruction in
180
2 CLP +
TCL
Hmin
-60
ns
Address float to PSEN
t
AZPL
0
0
ns
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