參數(shù)資料
型號(hào): Q67120-C508
英文描述: IC-SM-8-BIT CPU 12-MHZ
中文描述: 集成電路釤8位CPU的12兆赫
文件頁(yè)數(shù): 90/121頁(yè)
文件大?。?/td> 1000K
代理商: Q67120-C508
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Semiconductor Group
8-1
Power Saving Modes
C501
8
Power Saving Modes
The C501 provides two basic power saving modes :
Idle mode
Power down mode.
8.1
Power Saving Mode Control Register
The two power saving modes are controlled by bits which are located in the special function
registers PCON. The SFR PCON is located at SFR address 87H.
The bits PDE and IDLE in SFR PCON select the power down mode or the idle mode, respectively.
If the power down mode and the idle mode are set at the same time, power down takes precedence.
Furthermore, register PCON contains two general purpose flags. For example, the flag bits GF0
and GF1 can be used to give an indication if an interrupt occurred during normal operation or during
an idle. Then an instruction that activates idle can also set one or both flag bits. When idle is
terminated by an interrupt, the interrupt service routine can examine the flag bits.
Special Function Register PCON (Address 87H)
Reset Value : 0XXX0000B
Symbol
Function
Reserved for future use
GF1
General purpose flag
GF0
General purpose flag
PDE
Power down enable bit
When set, starting of the power down mode is enabled
IDLE
Idle mode enable bit
When set, starting of the idle mode is enabled
MSB
LSB
0
87H
PCON
SMOD
GF1
GF0
PDE
IDLE
7
6
5
4
3
2
1
Bit No.
The function of the shaded bit is not used for power saving mode control.
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