
HYB 39S64400/800/160BT(L)
64-MBit Synchronous DRAM
Data Book
6
12.99
Block Diagram: 4 Bank
×
1M
×
16 SDRAM
Memory
Array
Bank 1
4096 x 256
x 16 Bit
Memory
Array
Bank 2
4096 x 256
x 16 Bit
Memory
Array
Bank 3
4096 x 256
x 16 Bit
SPB04120
Column Address
Counter
Row
Decoder
Memory
Array
Bank 0
4096 x 256
x 16 Bit
C
S
Row
Decoder
S
Row
Decoder
Row
Decoder
C
S
Row Address
Buffer
Column Address
Buffer
Refresh Counter
S
A0 - A11,
BA0, BA1
A0 - A7, AP,
BA0, BA1
Column Addresses
Row Addresses
Input Buffer
Output Buffer
DQ0 - DQ15
Control Logic &
Timing Generator
C
C
C
R
C
W
D
D
C
C