參數(shù)資料
型號(hào): Q67060-S6302-A4
廠商: SIEMENS AG
英文描述: High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125
中文描述: 智能雙通道阻抗高側(cè)電源開關(guān)
文件頁(yè)數(shù): 9/14頁(yè)
文件大?。?/td> 191K
代理商: Q67060-S6302-A4
BTS 611 L1
Semiconductor Group
9
GND disconnect with GND pull up
PROFET
V
IN2
ST
OUT2
GND
bb
Vbb
1
2
4
3
5
IN1
OUT1
6
7
VIN1
VIN2
VST
VGND
Any kind of load. If V
GND >
V
IN
- V
IN(T+)
device stays off
Due to V
GND
>0, no V
ST
= low signal available.
V
bb
disconnect with energized inductive
load
PROFET
V
IN2
ST
OUT2
GND
bb
Vbb
1
2
4
3
5
IN1
OUT1
6
7
high
Normal load current can be handled by the PROFET
itself.
V
bb
disconnect with charged external
inductive load
PROFET
V
IN2
ST
OUT2
GND
bb
1
2
4
3
5
IN1
OUT1
6
7
Vbb
high
D
If other external inductive loads L are connected to the PROFET,
additional elements like D are necessary.
Inductive Load switch-off energy
dissipation
E
bb
PROFET
V
IN
ST
OUT
GND
bb
=
E
E
EAS
L
R
ELoad
L
R
L
{
Z
L
Energy stored in load inductance:
E
L
=
1/2
·
L
·
I
2
L
While demagnetizing load inductance, the energy
dissipated in PROFET is
E
AS
= E
bb
+ E
L
- E
R
=
V
ON(CL)
·
i
L
(t) dt,
with an approximate solution for R
L
>
0
:
E
AS
= I
L
·
L
2
·
R
L
·
(
V
bb
+
|V
OUT(CL)
|)
·
ln
(1+
Maximum allowable load inductance for
a single switch off
(both channels parallel)
L = f (I
L
);
T
j,start
=
150°C,T
C
=
150°C const.,
V
bb
=
12
V, R
L
=
0
L [mH]
1000
I
L
·
R
L
|V
OUT(CL)
| )
1
10
100
2
3
4
5
6
7
8
IL [A]
相關(guān)PDF資料
PDF描述
Q67060-S6307-A5 High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125
Q67060-S6307-A6 High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125
Q67060-S6307-A7 High Speed CMOS Logic Quad Bilateral Switches 14-PDIP -55 to 125
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