參數(shù)資料
型號: PZ3064I12BB1
廠商: NXP SEMICONDUCTORS
元件分類: PLD
英文描述: 64 macrocell CPLD
中文描述: EE PLD, 14.5 ns, PQFP100
封裝: 14 X 20 X 2.80 MM, PLASTIC, SOT-382-1, QFP-100
文件頁數(shù): 13/20頁
文件大小: 245K
代理商: PZ3064I12BB1
Philips Semiconductors
Product specification
PZ3064
64 macrocell CPLD
1997 Mar 05
93
Package Thermal Characteristics
Philips Semiconductors uses the Temperature Sensitive Parameter
(TSP) method to test thermal resistance. This method meets
Mil-Std-883C Method 1012.1 and is described in Philips 1995 IC
Package Databook Thermal resistance varies slightly as a function
of input power. As input power increases, thermal resistance
changes approximately 5% for a 100% change in power.
Figure 7 is a derating curve for the change in
Θ
JA
with airflow based
on wind tunnel measurements. It should be noted that the wind flow
dynamics are more complex and turbulent in actual applications
than in a wind tunnel. Also, the test boards used in the wind tunnel
contribute significantly to forced convection heat transfer, and may
not be similar to the actual circuit board, especially in size.
Package
Θ
JA
44-pin PLCC
44.8
°
C/W
44-pin TQFP
60.8
°
C/W
68-pin PLCC
44.9
°
C/W
84-pin PLCC
34.7
°
C/W
100-pin PQFP
44.5
°
C/W
0
10
20
30
40
50
0
1
2
3
4
5
PERCENTAGE
REDUCTION IN
JA
(%)
AIR FLOW (m/s)
PLCC/
QFP
SP00419A
Figure 7.
Average Effect of Airflow on
Θ
JA
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