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參數(shù)資料
| 型號(hào)： | PVX012A0X43-SRZ |
| 廠商： | LINEAGE POWER LLC |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封裝： | ROHS COMPLIANT PACKAGE-17/8 |
| 文件頁數(shù)： | 7/23頁 |
| 文件大?。?/td> | 1215K |
| 代理商： | PVX012A0X43-SRZ |
Data Sheet
May 13, 2011
12A Analog Pico DLynxTM: Non-isolated DC-DC Power Modules
3 – 14.4Vdc input; 0.6Vdc to 5.5Vdc output; 12A output current
LINEAGE POWER
15
Power Good
The module provides a Power Good (PGOOD) signal
that is implemented with an open-drain output to
indicate that the output voltage is within the regulation
limits of the power module. The PGOOD signal will be
de-asserted to a low state if any condition such as
overtemperature, overcurrent or loss of regulation
occurs that would result in the output voltage going
±10% outside the setpoint value. The PGOOD terminal
can be connected through a pullup resistor (suggested
value 100K
Ω) to a source of 5VDC or lower.
Dual Layout
Identical dimensions and pin layout of Analog and
Digital Pico DLynx modules permit migration from one
to the other without needing to change the layout. To
support this, 2 separate Trim Resistor locations have
to be provided in the layout. For the digital modules,
the resistor is connected between the TRIM pad and
SGND and in the case of the analog module it is
connected between TRIM and GND
Caution – Do not connect SIG_GND to GND
elsewhere in the layout
Figure 44. Layout to support either Analog or
Digital PicoDLynx on the same pad.
Tunable Loop
TM
The 12A Pico DLynx
TM modules have a feature that
optimizes transient response of the module called
Tunable Loop
TM.
External capacitors are usually added to the output of
the module for two reasons: to reduce output ripple
and noise (see Figure 38) and to reduce output voltage
deviations from the steady-state value in the presence
of dynamic load current changes. Adding external
capacitance however affects the voltage control loop of
the module, typically causing the loop to slow down
with sluggish response. Larger values of external
capacitance could also cause the module to become
unstable.
The Tunable Loop
TM allows the user to externally
adjust the voltage control loop to match the filter
network connected to the output of the module. The
Tunable Loop
TM is implemented by connecting a series
R-C between the SENSE and TRIM pins of the
module, as shown in Fig. 45. This R-C allows the user
to externally adjust the voltage loop feedback
compensation of the module.
Figure. 45. Circuit diagram showing connection of
RTUME and CTUNE to tune the control loop of the
module.
Recommended values of RTUNE and CTUNE for different
output capacitor combinations are given in Tables 2
and 3. Table 2 shows the recommended values of
RTUNE and CTUNE for different values of ceramic output
capacitors up to 1000uF that might be needed for an
application to meet output ripple and noise
requirements. Selecting RTUNE and CTUNE according to
Table 2 will ensure stable operation of the module.
In applications with tight output voltage limits in the
presence of dynamic current loading, additional output
capacitance will be required. Table 3 lists
recommended values of RTUNE and CTUNE in order to
meet 2% output voltage deviation limits for some
common output voltages in the presence of a 6A to
12A step change (50% of full load), with an input
voltage of 12V.
MODULE
VOUT
SENSE
TRIM
GND
RTUNE
CTUNE
RTrim
C O
MODULE
(PVX012 / PDT012)
Rtrim1
for
Digital
GND (PIN 7)
SIG_GND
TRIM
Rtrim2
for
Analog
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