
Pulse Period/Width Measurement on the M16C/62 
M16C
3. Pulse Period/Pulse Width Measurement Mode Description 
As illustrated in Figure 1, the timer TBi register consists of two parts, a counter and a reload register. In 
Measurement Mode, when an effective edge appears on the TBi
IN
 pin, the count value is transferred to 
the reload register and the CPU can read this value by performing a read on the TBi register. The 
measured time is the counter value (TBi) divided by the frequency of the clock source (Fi). Two period 
measurement options are available that measure from falling edge to falling edge or rising edge to rising 
edge. For width measurement, the measurement is taken at both edges and software determines if the 
measured value is for the high width or low. 
3.1 Pulse Period Measurement 
In Period Measurement Mode (e.g. falling edge to falling edge), after the ‘start count flag’ is set, the 
counter counts up using the selected clock source and every time a falling edge is detected on the TBi
IN
pin, the value in the counter is transferred to the reload register, the counter is reset to zero, and then 
continues counting. At the same time, the timer interrupt request bit is set and an interrupt is generated if 
the timer interrupt priority level is set above the current CPU priority level (if the I flag in the CPU flag 
register is cleared, the interrupt will not be serviced until the flag is set). If the timer’s counter overflows 
within a period, it will also generate the interrupt and the MR3 bit in the TBiMR is set to distinguish 
between the interrupt causes. Note that the measurement is free running and the reload register contains 
the most recent measurement. The user has the option of polling the TBi register or reading it in an 
interrupt service routine. Also note that the value of the counter immediately after the ‘start count flag’ is 
set is indeterminate and an overflow could occur before the first falling edge. Figure 2 illustrates this. 
Figure 2. Operation Timing When Measuring a Pulse Period 
AN-DECE-MCU-6-A 
May 2002 
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