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參數(shù)資料
| 型號： | PUCC3801P |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Current-mode PWM controller |
| 中文描述： | SWITCHING CONTROLLER, 100 kHz SWITCHING FREQ-MAX, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 308K |
| 代理商： | PUCC3801P |
Philips Semiconductors
PUCC3801
Current-mode PWM controller
Product data
Rev. 01 — 10 September 2001
3 of 16
9397 750 08419
Koninklijke Philips Electronics N.V. 2001. All rights reserved.
6.
Pinning information
6.1 Pinning
6.2 Pin description
7.
Functional description
7.1 Pin functions
7.1.1
Compensation pin (COMP)
The compensation pin is connected to the output of the error amplifier (ERRAMP).
This pin is normally connected via a feedback network to the FB pin. The COMP pin
can also be used as an input for an optocoupled control signal to the pulse width
modulator (PWM) comparator. When an optocoupler is used, the collector of the
optocoupler photo-transistor is connected to the COMP pin, with a pull-up resistor to
V
DD
. The FB pin must be grounded to force the output of the error amplifier HIGH.
7.1.2
Feedback pin (FB)
The feedback (FB) pin is the inverting input to the error amplifier. If FB is left open, an
internal divider from V
DD
will tend to regulate V
DD
at a nominal 12 V.
Fig 2.
Pin configuration; PUCC3801P (SOT97-1).
Fig 3.
Pin configuration; PUCC3801T (SOT96-1).
03af31
PUCC3801P
1
2
3
4
COMP
FB
CSNS
n.c.
REG
VDD
OUT
GND
8
7
6
5
003aaa119
PUCC3801T
1
2
3
4
COMP
FB
CSNS
n.c.
REG
VDD
OUT
GND
8
7
6
5
Table 2:
Symbol
COMP
FB
CSNS
n.c.
GND
OUT
V
DD
REG
Pin description
Pin
1
2
3
4
5
6
7
8
I/O
I/O
I
I
O
O
Description
compensation pin
feedback pin
current sense input
no connection
circuit common ground
gate drive output
positive supply voltage
voltage regulator decoupling pin
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