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參數(shù)資料
| 型號： | PTH12010WAST |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封裝： | DIP-10 |
| 文件頁數(shù)： | 14/27頁 |
| 文件大?。?/td> | 931K |
| 代理商： | PTH12010WAST |
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Margin Up/Down Controls
R
U or RD +
499
D %
* 99.8 kW
(2)
C
O
+
C
I
V
I
GND
MarginDown
L
O
A
D
Q2
+V
O
+V
O
Q1
+
MarginUp
0V
R
D
R
U
PT H12010W
(TopView)
1
2
10 9
8
7
6
5
4
3
GND
R
0.1W,1%
SET
SLTS205G – JUNE 2003 – REVISED FEBRUARY 2007
The PTH12060, PTH12010, PTH12020, and PTH12030 products incorporate Margin Up and Margin Down
control inputs. These controls allow the output voltage to be momentarily adjusted [1], either up or down, by a
nominal 5%. This provides a convenient method for dynamically testing the operation of the load circuit over its
supply margin or range. It can also be used to verify the function of supply voltage supervisors. The
±5% change
is applied to the adjusted output voltage, as set by the external resistor, RSET at the VO Adjust pin.
The 5% adjustment is made by pulling the appropriate margin control input directly to the GND terminal [2]. A
low-leakage, open-drain device, such as an n-channel MOSFET or p-channel JFET is recommended for this
purpose [3]. Adjustments of less than 5% can also be accommodated by adding series resistors to the control
inputs. The value of the resistor can be selected from Table 6, or calculated using Equation 2.
Margin Up/Down Adjust Resistance Calculation
To reduce the margin adjustment to a value less than 5%, series resistors are required (See RD and RU in
Figure 19). For the same amount of adjustment, the resistor value calculated for RU and RD is the same. The
formula is as follows.
Where
% = The desired amount of margin adjust in percent.
Notes:
1. The Margin Up and Margin Down controls were not intended to be activated simultaneously. If they are
activated simultaneously, the affect on the output voltage may not completely cancel, resulting in the
possibility of a slightly higher error in the output voltage set point.
2. The ground reference should be a direct connection to the module GND. This produces a more accurate
adjustment at the load circuit terminals. The transistors Q1 and Q2 should be located close to the
regulator.
3. The Margin Up and Margin Down control inputs are not compatible with devices that source voltage. This
includes TTL logic. These are analog inputs and should only be controlled with a true open-drain device
(preferably a discrete MOSFET transistor). The device selected should have low off-state leakage current.
Each input sources 8 A when grounded, and has an open-circuit voltage of 0.8 V.
Table 6. Margin Up/Down Resistor Values
% Adjust
5%
4%
3%
2%
1%
RU / RD(k)
0.0
24.9
66.5
150.0
397.0
Figure 19. Margin Up/Down Application Schematic
21
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