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參數(shù)資料
| 型號： | PSD934210MT |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit 256 Kbit Dual Flash Memories and 64 Kbit SRAM |
| 中文描述： | 閃光私營部門，3.3V電源，為8位微控制器2兆256千位雙閃存和64千位的SRAM |
| 文件頁數(shù)： | 6/89頁 |
| 文件大小： | 615K |
| 代理商： | PSD934210MT |
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PSD834F2V
6/89
KEY FEATURES
I
A simple interface to 8-bit microcontrollers that
use either multiplexed or non-multiplexed
busses. The bus interface logic uses the control
signals generated by the microcontroller
automatically when the address is decoded and
a read or write is performed. A partial list of the
MCU families supported include:
– Intel 8031, 80196, 80186, 80C251, and
80386EX
– Motorola 68HC11, 68HC16, 68HC12, and
683XX
– Philips 8031 and 8051XA
– Zilog Z80 and Z8
I
Internal 2 Mbit Flash memory. This is the main
Flash memory. It is divided into 8 equal-sized
blocks that can be accessed with user-specified
addresses.
I
Internal secondary 256 Kbit Flash boot memory.
It is divided into 4 equal-sized blocks that can be
accessed with user-specified addresses. This
secondary memory brings the ability to execute
code and update the main Flash
concurrently
.
I
Internal 64 Kbit SRAM. The SRAM’s contents
can be protected from a power failure by
connecting an external battery.
I
CPLD with 16 Output macrocells (OMCs) and
24 Input macrocells (IMCs). The CPLD may be
used to efficiently implement a variety of logic
functions for internal and external control.
Examples include state machines, loadable
shift registers, and loadable counters.
I
Decode PLD (DPLD) that decodes address for
selection of internal memory blocks.
I
27 individually configurable I/O port pins that
can be used for the following functions:
– MCU I/Os
– PLD I/Os
– Latched MCU address output
– Special function I/Os.
– 16 of the I/O ports may be configured as
open-drain outputs.
I
Standby current as low as 25 μA.
I
Built-in JTAG compliant serial port allows full-
chip In-System Programmability (ISP). With it,
you can program a blank device or reprogram a
device in the factory or the field.
I
Internal page register that can be used to
expand the microcontroller address space by a
factor of 256.
I
Internal programmable Power Management
Unit (PMU) that supports a low power mode
called Power Down Mode. The PMU can
automatically detect a lack of microcontroller
activity and put the PSD into Power-down
mode.
I
Erase/Write cycles:
– Flash memory – 100,000 minimum
– PLD – 1,000 minimum
– Data Retention: 15 year minimum (for Main
Flash memory, Boot, PLD and Configuration
bits)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD834F2V | Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit 256 Kbit Dual Flash Memories and 64 Kbit SRAM |
| PSD934F2V-20MI | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD934F2V | |
| PSD934F2V-15J | Low Power Economy BiCMOS Current Mode PWM 8-TSSOP -40 to 85 |
| PSD934F2V-15M | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD934F2-15J | 功能描述:SPLD - 簡單可編程邏輯器件 5V 2M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD934F290J | 制造商:WSI 功能描述: |
| PSD934F2-90J | 功能描述:SPLD - 簡單可編程邏輯器件 PLCC-52 5V 2M 90NS RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD934F2-90M | 功能描述:SPLD - 簡單可編程邏輯器件 5V 2M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD934F2V-15J | 功能描述:SPLD - 簡單可編程邏輯器件 3.3V 2M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
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