
PSD8XX Family
PSD835G2
80
AC Symbols for PLD Timing.
Example:
t
AVLX
– Time from Address Valid to ALE Invalid.
Signal Letters
A
– Address Input
C
– CEout Output
D
– Input Data
E
– E Input
I
– Interrupt Input
L
– ALE Input
N
– Reset Input or Output
P
– Port Signal Output
R
– UDS, LDS, DS, RD, PSEN Inputs
S
– Chip Select Input
T –
R/W Input
W –
WR Input
B –
Vstby Output
M
– Output Micro
Cell
Signal Behavior
t
– Time
L
– Logic Level Low or ALE
H
– Logic Level High
V
– Valid
X
– No Longer a Valid Logic Level
Z
– Float
PW
– Pulse Width
Microcontroller
Interface –
AC/DC
Parameters
(5V ±10% Versions)