
P
P
3
P
8
INPUT MICRO
CELL & INPUT PORTS
DIRECT MICRO
CELL INPUT TO MCU DATA BUS
CSIOP SELECT
SRAM SELECT
FLASH BOOT MEMORY SELECTS
DECODE PLD
PAGE
REGISTER
PERIPHERAL I/O MODE SELECTS
JTAG SELECT
CPLD
PT
ALLOC.
MCELLA
TO PORT A
MCELLB
TO PORT B
DIRECT MICRO
CELL ACCESS FROM MCU DATA BUS
24 INPUT MICRO
CELL
(PORT A,B,C)
16 OUTPUT
MICRO
CELL
I
FLASH MEMORY SELECTS
12
PORT D AND F INPUTS
DATA
BUS
8
8
8
4
1
1
2
1
EXTERNAL CHIP SELECTS
TO PORT C OR F
8
82
16
82
24
OUTPUT MICRO
CELL FEEDBACK
F