參數(shù)資料
        

        


        


        
型號(hào)：
PSD4235G2-15MI

        

        
廠商：
意法半導(dǎo)體

        

        
英文描述：
Flash In-System-Programmable Peripherals for 16-Bit MCUs

        

        
中文描述：
Flash在系統(tǒng)可編程外設(shè)的16位微控制器

        

        
文件頁數(shù)：
28/93頁

        

        
文件大?。?/td>
503K

        

        
代理商：
PSD4235G2-15MI


        

        

        

	
        
    
    

    
        
	
        Preliminary Information
        PSD4000 Series
        25
        The 
        PSD4000
        Functional
        Blocks
        (cont.)
        Bit 7
        Bit 6
        Bit 5
        Bit 4
        Bit 3
        Bit 2
        Bit 1
        Bit 0
        Sec7_Prot
        Sec6_Prot
        Sec5_Prot
        Sec4_Prot
        Sec3_Prot
        Sec2_Prot
        Sec1_Prot Sec0_Prot
        Flash Protection Register
        9.1.1.9.2   Reset Instruction
        The Reset instruction consists of one write cycle (see Table 8). It can also be optionally 
        preceded by the standard two write decoding cycles (writing AAh to AAAh and 55h to
        554h).
        The Reset instruction must be executed after:
        1. Reading the Flash Protection status or Flash ID using the Flash instruction.
        2. When an error condition occurs (DQ5 (DQ13) goes high) during a Flash programming 
        or erase cycle.
        The Reset instruction will reset the Flash to normal Read Mode immediately. However, if
        there is an error condition (DQ5 (DQ13) goes high), the Flash memory will return to the
        Read Mode in 25 μSeconds after the Reset instruction is issued.
        The Reset instruction is ignored when it is issued during a Flash programming or Bulk
        Erase cycle. The Reset instruction will abort the on going sector erase cycle and return the
        Flash memory to normal Read Mode in 25 μSeconds.
        9.1.1.9.3   Reset Pin Input 
        The reset pulse input from the pin will abort any operation in progress and reset the Flash 
        memory to Read Mode. When the reset occurs during a programming or erase cycle, the 
        Flash memory will take up to 25 μSeconds to return to Read Mode. It is recommended that
        the reset pulse (except power on reset, see Reset Section) be at least 25 μSeconds such
        that the Flash memory will always be ready for the MCU to fetch the boot code after reset
        is over.
        Bit Definitions:
        Sec<i>_Prot
        Sec<i>_Prot
        1 = Main Flash Sector <i> is write protected.
        0 = Main Flash Sector <i> is not write protected.
        Bit 7
        Bit 6
        Bit 5
        Bit 4
        Bit 3
        Bit 2
        Bit 1
        Bit 0
        Security_
        Bit
        *
        *
        *
        Sec3_Prot
        Sec2_Prot
        Sec1_Prot Sec0_Prot
        Flash Boot Protection Register
        Bit Definitions:
        Sec<i>_Prot
        Sec<i>_Prot
        Security_Bit
        1 = Flash Boot Sector <i> is write protected.
        0 = Flash Boot Sector <i> is not write protected.
        0 = Security Bit in device has not been set.
        1 = Security Bit in device has been set.
        Table 10.  Sector Protection/Security Bit Definition
        *:
         Not used.
        
    
        
    
    
        


        


        

        相關(guān)PDF資料
        		

        PDF描述
        		

        
        

        
PSD4235G2-15U
Flash In-System-Programmable Peripherals for 16-Bit MCUs

        

        
PSD4235G3-12U
Flash In-System-Programmable Peripherals for 16-Bit MCUs

        

        
PSD4135F3-90MI
Flash In-System-Programmable Peripherals for 16-Bit MCUs

        

        
PSD4135F3-90U
Flash In-System-Programmable Peripherals for 16-Bit MCUs

        

        
PSD4135F3-90UI
Flash In-System-Programmable Peripherals for 16-Bit MCUs

        

        

        

        


        


        

        相關(guān)代理商/技術(shù)參數(shù)
        		

        參數(shù)描述
        		

        
        

        
PSD4235G2-70U
功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24

        

        
PSD4235G2-90U
功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns

 RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100

        

        
PSD4235G2-90UI
功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns

 RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100

        

        
PSD4235G2V-12UI
功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 4M 120ns

 RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100

        

        
PSD4235G2V-90U
功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 4M 90ns

 RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100

        

        
    
    
    
	
        	
    
    
     
     
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