• <em id="lnthg"><sup id="lnthg"><wbr id="lnthg"></wbr></sup></em>
    <ins id="lnthg"></ins>
  • <pre id="lnthg"><fieldset id="lnthg"></fieldset></pre>
    參數(shù)資料
    型號: PSD4235F2V-B-70J
    廠商: 意法半導(dǎo)體
    英文描述: Flash In-System-Programmable Peripherals for 16-Bit MCUs
    中文描述: Flash在系統(tǒng)可編程外設(shè)的16位微控制器
    文件頁數(shù): 59/93頁
    文件大小: 503K
    代理商: PSD4235F2V-B-70J
    PSD4000 Series
    Preliminary Information
    56
    The
    PSD4000
    Functional
    Blocks
    (cont.)
    Access
    5V V
    CC
    ,
    Typical
    Standby
    Current
    50 μA
    (Note 2)
    PLD
    Memory
    Access
    Time
    Recovery Time
    to Normal
    Access
    Propagation
    Delay
    Normal tpd
    (Note 1)
    Mode
    Power Down
    No Access
    tLVDV
    Table 25. PSD4000 Timing and Standby Current During Power
    Down Mode
    NOTES:
    1. Power Down does not affect the operation of the PLD. The PLD operation in this
    mode is based only on the Turbo Bit.
    2. Typical current consumption assuming no PLD inputs are changing state and
    the PLD Turbo bit is off.
    Port Function
    MCU I/O
    PLD Out
    Address Out
    Data Port
    Peripheral I/O
    Pin Level
    No Change
    No Change
    Undefined
    Three-State
    Three-State
    Table 24. Power Down Mode’s Effect on
    Ports
    9.5.1 Automatic Power Down (APD) Unit and Power Down Mode (cont.)
    Power Down Mode
    By default, if you enable the PSD APD unit, Power Down Mode is automatically enabled.
    The device will enter Power Down Mode if the address strobe (ALE/AS) remains inactive
    for fifteen CLKIN (pin PD1) clock periods.
    The following should be kept in mind when the PSD is in Power Down Mode:
    If the address strobe starts pulsing again, the PSD will return to normal operation.
    The PSD will also return to normal operation if either the CSI input returns low or the
    Reset input returns high.
    The MCU address/data bus is blocked from all memories and PLDs.
    Various signals can be blocked (prior to Power Down Mode) from entering the PLDs
    by setting the appropriate bits in the PMMR registers. The blocked signals include
    MCU control signals and the common clock (CLKIN). Note that blocking CLKIN from
    the PLDs will not block CLKIN from the APD unit.
    All PSD memories enter Standby Mode and are drawing standby current. However,
    the PLDs and I/O ports do
    not
    go into Standby Mode because you don
    t want to
    have to wait for the logic and I/O to
    wake-up
    before their outputs can change. See
    Table 24 for Power Down Mode effects on PSD ports.
    Typical standby current is 50 μA for 5 V parts. This standby current value assumes
    that there are no transitions on any PLD input.
    相關(guān)PDF資料
    PDF描述
    PSD4235F2V-B-70JI Flash In-System-Programmable Peripherals for 16-Bit MCUs
    PSD4235F2V-B-70M Flash In-System-Programmable Peripherals for 16-Bit MCUs
    PSD4235F2V-B-70MI High Grade COTS Tantalum Chips - T497 Series; Capacitance [nom]: 10uF; Working Voltage (Vdc)[max]: 15V; Capacitance Tolerance: +/-10%; Dielectric: Tantalum, Solid; Lead Style: Surface-Mount Chip; Lead Dimensions: 2214; Termination: Gold Plated; Body Dimensions: 5.08mm x 2.54mm x 1.27mm; Temperature Range: -55C to +125C; Container: Tape &amp; Reel; Qty per Container: 1,000; Features: High Grade COTS
    PSD4235F2V-B-70U Flash In-System-Programmable Peripherals for 16-Bit MCUs
    PSD4235F2V-B-70UI Flash In-System-Programmable Peripherals for 16-Bit MCUs
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    PSD4235G2-70U 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
    PSD4235G2-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
    PSD4235G2-90UI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
    PSD4235G2V-12UI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 4M 120ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
    PSD4235G2V-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100