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參數資料
| 型號： | PSD4235F1V-C-15MI |
| 廠商： | 意法半導體 |
| 英文描述： | Tantalum Capacitor; Capacitance:4.7uF; Capacitance Tolerance:+/- 10 %; Working Voltage, DC:35V; Package/Case:7343-31; Terminal Type:PCB SMT; ESR:1.5ohm; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes; Series:T496 |
| 中文描述： | Flash在系統(tǒng)可編程外設的16位微控制器 |
| 文件頁數： | 23/93頁 |
| 文件大?。?/td> | 503K |
| 代理商： | PSD4235F1V-C-15MI |
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PSD4000 Series
Preliminary Information
20
9.1.1.6 Programming Flash Memory
Flash memory must be erased prior to being programmed. The MCU may erase Flash
memory all at once or by-sector. Flash memory sector erases to all logic ones, and its bits
are programmed to logic zeros. Although erasing Flash memory occurs on a sector or chip
basis, programming Flash memory occurs on a word basis.
The PSD4000 main Flash and secondary Flash memories require the MCU to send an
instruction to program a word or perform an erase function (see Table 8).
Once the MCU issues a Flash memory program or erase instruction, it must check for the
status of completion. The embedded algorithms that are invoked inside the PSD4000
support several means to provide status to the MCU. Status may be checked using any of
three methods: Data Polling, Data Toggle, or the Ready/Busy output pin.
9.1.1.6.1 Data Polling
Polling on DQ7 (DQ15) is a method of checking whether a Program or Erase instruction is
in progress or has completed. Figure 3 shows the Data Polling algorithm.
When the MCU issues a programming instruction, the embedded algorithm within the
PSD4000 begins. The MCU then reads the location of the word to be programmed in Flash
to check status. Data bit DQ7 (DQ15) of this location becomes the compliment of data bit
7of the original data word to be programmed. The MCU continues to poll this location,
comparing DQ7 (DQ15) and monitoring the Error bit on DQ5 (DQ13). When the DQ7
(DQ15) matches data bit 7 of the original data, and the Error bit at DQ5 (DQ13) remains
‘0’, then the embedded algorithm is complete. If the Error bit at DQ5 is ‘1’, the MCU should
test DQ7 (DQ15) again since DQ7 (DQ15) may have changed simultaneously with DQ5
(DQ13) (see Figure 3).
The Error bit at DQ5 (DQ13) will be set if either an internal timeout occurred while the
embedded algorithm attempted to program the location or if the MCU attempted to
program a ‘1’ to a bit that was not erased (not erased is logic ‘0’).
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed to compare the word that was written to Flash with
the word that was intended to be written.
When using the Data Polling method after an erase instruction, Figure 3 still applies.
However, DQ7 (DQ15) will be ‘0’ until the erase operation is complete. A ‘1’ on DQ5
(DQ13) will indicate a timeout failure of the erase operation, a ‘0’ indicates no error.
The MCU can read any location within the sector being erased to get DQ7 (DQ15) and
DQ5 (DQ13) .
PSDsoft generates ANSI C code functions which implement these Data Polling
algorithms.
The
PSD4000
Functional
Blocks
(cont.)
相關PDF資料 |
PDF描述 |
|---|---|
| PSD4235F1V-C-70B81 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F1V-C-70B81I | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F1V-C-70J | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F1V-C-70JI | Tantalum Capacitor; Capacitance:47uF; Capacitance Tolerance:+/- 20 %; Working Voltage, DC:10V; Package/Case:7343-31; Terminal Type:PCB SMT; ESR:1ohm; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes; Series:T496 |
| PSD4235F1V-C-70M | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PSD4235G2-70U | 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD4235G2-90U | 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD4235G2-90UI | 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD4235G2V-12UI | 功能描述:CPLD - 復雜可編程邏輯器件 3.3V 4M 120ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| PSD4235G2V-90U | 功能描述:CPLD - 復雜可編程邏輯器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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