參數(shù)資料
型號(hào)： PSD4135G2-B-70MI
廠商： 意法半導(dǎo)體
英文描述： Flash In-System-Programmable Peripherals for 16-Bit MCUs
中文描述： Flash在系統(tǒng)可編程外設(shè)的16位微控制器
文件頁(yè)數(shù)： 76/93頁(yè)
文件大?。?/td> 503K
代理商： PSD4135G2-B-70MI
Preliminary Information
PSD4000 Series
73
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
CC
V
IH
V
IL
V
IH1
V
IL1
V
HYS
V
LKO
Supply Voltage
All Speeds
3.0
3.6
V
High Level Input Voltage
3.0 V < V
CC
< 3.6 V
3.0 V < V
CC
< 3.6 V
(Note 1)
.7 V
CC
–.5
V
CC
+.5
0.8
V
Low Level Input Voltage
V
Reset High Level Input Voltage
.8 V
CC
–.5
V
CC
+.5
.2 V
CC
–.1
V
Reset Low Level Input Voltage
(Note 1)
V
Reset Pin Hysteresis
0.3
V
V
CC
Min for Flash Erase and Program
1.5
2.3
V
V
OL
Output Low Voltage
I
OL
= 20 μA, V
CC
= 3.0 V
0.01
0.1
V
I
OL
= 4 mA, V
CC
= 3.0 V
I
OH
= –20 μA, V
CC
= 3.0 V
0.15
0.45
V
V
OH
Output High Voltage Except V
STBY
On
2.9
2.99
V
I
OH
= –1 mA, V
CC
= 3.0 V
I
OH1
= –1 μA
2.7
2.8
V
V
OH1
V
SBY
I
SBY
I
IDLE
V
DF
Output High Voltage V
STBY
On
SRAM Standby Voltage
V
SBY
– 0.8
2.0
V
V
CC
1
V
SRAM Standby Current (V
STBY
Pin)
Idle Current (V
STBY
Pin)
SRAM Data Retention Voltage
V
CC
= 0 V
V
CC
> V
SBY
Only on V
STBY
0.5
μA
–0.1
0.1
μA
2
V
I
SB
Standby Supply Current
for Power Down Mode
CSI >V
CC
–0.3 V
(Notes 2 and 3)
50
100
μA
I
LI
I
LO
Input Leakage Current
V
SS
< V
IN
< V
CC
0.45 < V
IN
< V
CC
–1
±.1
1
μA
Output Leakage Current
–10
±5
10
μA
I
O
Output Current
Refer to I
OL
and I
OH
in
the V
OL
and V
OH
row
PLD_TURBO = OFF,
f = 0 MHz (Note 3)
0
mA
PLD Only
PLD_TURBO = ON,
f = 0 MHz
I
CC
(DC)
(Note 5)
Operating
Supply Current
200
400
μA/PT
During FLASH
Write/Erase Only
FLASH
10
25
mA
Read Only, f = 0 MHz
0
0
mA
SRAM
f = 0 MHz
0
0
mA
PLD AC Base
(Note 4)
Figure 27a
I
CC
(AC)
(Note 5)
FLASH
AC Adder
1.5
2.0
mA/MHz
SRAM AC Adder
0.8
1.5
mA/MHz
PSD4000 DC Characteristics
(3.0 V to 3.6 V Versions)
Advance Information
NOTES:
1.
Reset input has hysteresis. V
IL1
is valid at or below .2V
CC
–.1. V
IH1
is valid at or above .8V
CC
.
CSI deselected or internal PD mode is active.
PLD is in non-turbo mode and none of the inputs are switching.
Refer to Figure 31a for PLD current calculation.
I
O
= 0 mA.
2.
3.
4.
5.
相關(guān)PDF資料
PDF描述
PSD4135G2-B-70U Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135G2-B-70UI Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135G2-B-90B81 Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135G2-B-90B81I CAP 0.033UF 50V 1% NP0(C0G) SMD-2225 TR-7-PL SN-NIBAR
PSD4135G2-C-20B81I Flash In-System-Programmable Peripherals for 16-Bit MCUs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD4135G2-B-70U 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135G2-B-70UI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135G2-B-90B81 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135G2-B-90B81I 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135G2-B-90J 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
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