參數(shù)資料
    型號: PSD4135F3V-B-15M
    廠商: 意法半導體
    英文描述: Flash In-System-Programmable Peripherals for 16-Bit MCUs
    中文描述: Flash在系統(tǒng)可編程外設的16位微控制器
    文件頁數(shù): 2/93頁
    文件大小: 503K
    代理商: PSD4135F3V-B-15M
    i
    PSD4000 Series
    PSD4135G2
    Flash In-System-Programmable Peripherals for 16-Bit MCUs
    Table of Contents
    Introduction ........................................................................................................................................................................................1
    In-System Programming (ISP) JTAG .......................................................................................................................................2
    In-Application re-Programming (IAP) .......................................................................................................................................2
    Key Features......................................................................................................................................................................................3
    PSD4000 Family................................................................................................................................................................................3
    Block Diagram....................................................................................................................................................................................4
    Architectural Overview.......................................................................................................................................................................5
    Memory ....................................................................................................................................................................................5
    PLDs.........................................................................................................................................................................................5
    I/O Ports ...................................................................................................................................................................................5
    Microcontroller Bus Interface....................................................................................................................................................5
    ISP via JTAG Port ....................................................................................................................................................................6
    In-System Programming (ISP) .................................................................................................................................................6
    In-Application re-Programming (IAP) .......................................................................................................................................6
    Page Register...........................................................................................................................................................................6
    Power Management Unit..........................................................................................................................................................6
    Development System.........................................................................................................................................................................7
    Pin Descriptions.................................................................................................................................................................................8
    Register Description and Address Offset.........................................................................................................................................11
    Register Bit Definition ......................................................................................................................................................................12
    Functional Blocks.............................................................................................................................................................................15
    Memory Blocks.......................................................................................................................................................................15
    Main Flash and Secondary Flash Memory Description ...................................................................................................15
    SRAM...............................................................................................................................................................................26
    Memory Select Signals ....................................................................................................................................................26
    Page Register ..................................................................................................................................................................29
    Memory ID Registers .......................................................................................................................................................30
    PLDs.......................................................................................................................................................................................31
    Decode PLD (DPLD)........................................................................................................................................................33
    General Purpose PLD (GPLD).........................................................................................................................................33
    Microcontroller Bus Interface..................................................................................................................................................36
    Interface to a Multiplexed Bus..........................................................................................................................................36
    Interface to a Non-multiplexed Bus..................................................................................................................................36
    Data Byte Enable Reference ...........................................................................................................................................38
    Microcontroller Interface Examples..................................................................................................................................39
    I/O Ports .................................................................................................................................................................................44
    General Port Architecture ................................................................................................................................................44
    Port Operating Modes......................................................................................................................................................44
    Port Configuration Registers (PCRs)...............................................................................................................................48
    Port Data Registers..........................................................................................................................................................49
    Ports A, B and C – Functionality and Structure ...............................................................................................................50
    Port D – Functionality and Structure................................................................................................................................51
    Port E – Functionality and Structure ................................................................................................................................51
    Port F – Functionality and Structure ................................................................................................................................52
    Port G – Functionality and Structure................................................................................................................................52
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