參數(shù)資料
型號: PSD312
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,4位頁寄存器,19個可編程I/O,通用PLD有16個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,16K的位的SRAM,4位頁寄存器,19個可編程的I / O,通用PLD的有16個輸入)
文件頁數(shù): 6/14頁
文件大?。?/td> 144K
代理商: PSD312
1-286
PSD3XX – Application Note 032
The Emulator functions by replacing the system’s EPROM with SRAM. To accomplish this,
when the system PSD3XX is configured by the PSDsoft software, ES0 – ES7 are
disabled (i.e., not defined in the PSDabel source file) to prevent their eight respective
internal EPROM blocks from attempting to access the external Data Bus. Reference
Figure 5 – PSD3XX PAD Description. Appendix A contains the generalized System
PSD3XX Configuration Printout (PSDsoft Fitter Output Report) corresponding to the
Interface Diagram in Figure 2 and the Memory Map in Figure 6 configured as an example.
The Address Map is configured such that all routines are accessible from either Page 1 or
Page 2 of main memory.
Note:
The Address Map Equations in Appendix A shows ES0 – ES7 active to illustrate the
block addresses which will be controlled by PB0 – PB1 in the Emulator PSD3XX.
ES0 – ES7 are left blank in the actual chip configuration.
System
PSD3XX
Configuration
ALE or AS
WR or R/W
A19
A18
A17
A16
A15
A14
A13
A12
A11
ES0
ES1
ES2
ES3
ES4
ES5
ES6
ES7
RS0
CSIOPORT
CSADIN
CSADOUT1
CSADOUT2
CS0/PB0
CS1/PB1
CS2/PB2
CS3/PB3
CS4/PB4
CS5/PB5
CS6/PB6
CS7/PB7
CS8/PC0
CS9/PC1
CS10/PC2
RD or E
8 EPROM BLOCK
SELECT LINES
CSI
RESET
SRAM BLOCK SELECT
TRACK MODE
CONTROL SIGNALS
P
0
P
1
P
2
P
3
I/O BASE ADDRESS
PAD
B
PAD
A
Figure 5. PSD3XX PAD Description
NOTES:
1. CSI is a power-down signal. When high, the PAD is in stand-by mode and all its outputs become
non-active.
2. RESET deselects all PAD output sigals
3. A18, A17, and A16 are internally multiplexed with CS10, CS9, and CS8, respectively. Either A18 or
CS10, A17 or CS9, and A16 or CS8 can be routed to the external pins of Port C. Port C can be
configured as either input or output.
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PSD314R Field Programmable Microcontroller Peripherals(可編程邏輯,無SRAM,19個可編程I/O,通用PLD有16個輸入)
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