參數(shù)資料
型號(hào)： PSD211RN
廠商： 意法半導(dǎo)體
英文描述： Low Cost Field Programmable Microcontroller Peripherals
中文描述： 低成本現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備
文件頁(yè)數(shù)： 14/51頁(yè)
文件大小： 348K
代理商： PSD211RN
PSD211R Famly
11
Function
PADA and PADB Inputs
In CSI mode (when high), PAD deselects all of its outputs and enters a
power-down mode (see Tables 7A and 7B). In A19 mode, it is another
input to the PAD.
A19/CSI
A16–A18
These are general purpose inputs from Port C. See Figure 4, Note 3.
A11–A15
These are address inputs.
RD/E
This is the read pulse or enable strobe input.
WR or R/W
This is the write pulse or R/W select signal.
ALE/AS
This is the ALE or AS input to the chip.
RESET
This deselects all outputs from the PAD; it can not be used in product
term equations. See Tables 8A and 8B.
PADA Outputs
These are internal chip-selects to the 8 EPROM banks. Each bank can
be located on any boundary that is a function of one product term of the
PAD address inputs.
ES0–ES7
This internal chip-select selects the I/O ports. It can be placed on any
boundary that is a function of one product term of the PAD inputs. See
Table 5.
CSIOPORT
PADB Outputs
CS0–CS3
These chip-select outputs can be routed through Port B. Each of them is
a function of up to four product terms of the PAD inputs.
CS4–CS7
These chip-select outputs can be routed through Port B. Each of them is
a function of up to two product terms of the PAD inputs.
CS8–CS10
These chip-select outputs can be routed through Port C. See Figure 4,
Note 3. Each of them is a function of one product term of the PAD inputs.
Table 4. PSD211R PADA and PADB Functions
Programmable
Address
Decoder (PAD)
(cont.)
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