參數(shù)資料
型號： PSD211R-B-15M
廠商： 意法半導(dǎo)體
英文描述： Low Cost Field Programmable Microcontroller Peripherals
中文描述： 低成本現(xiàn)場可編程微控制器外圍設(shè)備
文件頁數(shù)： 10/51頁
文件大小： 348K
代理商： PSD211R-B-15M
PSD211R Famly
7
Name
Type
Description
This pin is for 8031 or compatible MCUs that use PSEN to
separate program space from data space. In this case, PSEN is
used for reads from the EPROM.
Notes:
1) If your MCU does not output a PSEN signal, pull up this pin to
V
CC
.
2) In programming mode, this pin is pulsed between V
PP
and 0 V.
The following control signals can be connected to this port, based on
your MCU (and the way you configure the PSD in PSDsoft):
1. WR—active-low write pulse.
2. R/W—active-high read/active-low write input.
Note:
in programming mode, this pin
must
be tied to V
PP
.
The following control signals can be connected to this port, based on
your MCU (and the way you configure the PSD in PSDsoft):
1. RD—active-low read input.
2. E—E clock input.
PSEN
I
WR/V
PP
or
R/W/V
PP
I
RD/E
I
The following control signals can be connected to this port:
1. CSI-Active-low chip select input. If your MCU supports a chip
select output, and you want the PSD to save power when not
selected, use this pin as a chip select input.
2. If you don’t wish to use the CSI feature, you may use this pin as
an additional input (logic or address) to the PAD. A19 can be
latched with ALE/AS, or be a transparent logic input.
A19/CSI
I
PSD211R/ZPSD211R:
This pin is user-programmable and can be configured to reset on a
high- or low-level input. Reset must be applied for at least 100 ns.
ZPSD211RV:
This pin is not configurable, and the chip will only reset on an
active-low level input. Reset must be applied for at least 500 ns,
and no operations may take place for an additional 500 ns minimum.
(See Figure 8.)
Reset
I
ALE/AS
I
Connect ALE or AS to this pin. The polarity of this pin is configurable.
The trailing edge of ALE/AS latches all multiplexed address inputs.
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
These pins make up Port A. These port pins are configurable, and
can have the following functions: (see Figure 5)
1. MCU I/O—in this mode, the direction of the pin is defined by its
direction bit, which resides in the direction register.
2. Latched address output.
I/O
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
These pins make up Port B. These port pins are configurable, and
can have the following functions: (see Figure 6)
1. MCU I/O—in this mode, the direction of the pin is defined by its
direction bit, which resides in the direction register.
2. Chip select output—each of PB0-3 has four product terms
available per pin, while PB4-7 have 2 product terms each.
See Figure 4.
I/O
Legend:
The Type column abbreviations are: I = input only; I/O = input/output; P = power.
Table 2.
PSD211R Pin
Descriptions
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