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參數(shù)資料
| 型號： | PSB4851 |
| 英文描述： | Analog Front End for Sophisticated Answering Machine |
| 中文描述： | 模擬前端的精密應(yīng)答機(jī) |
| 文件頁數(shù)： | 21/44頁 |
| 文件大?。?/td> | 752K |
| 代理商： | PSB4851 |
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PSB 4851
Data Sheet
21
09.99
2.5
Serial Control Interface
The serial control interface (SCI) uses four lines. Data is transferred by the lines SDR
and SDX at the rate given by SCLK. The falling edge of CS indicates the beginning of an
access. Data is sampled by the PSB 4851 at the rising edge of SCLK and shifted out at
the falling edge of SCLK. Each access must be terminated by a rising edge of CS.
Data is transferred in bytes (8 bits). Data from the controller is latched into a register at
the rising edge of CS. Figure 2-10 shows a write access to the PSB 4851 and figure 2-
11 shows a read access to the PSB 4851.
Figure 2-10
SCI Interface - Write Access
Figure 2-11
SCI Interface - Read Access
CS
SCLK
SDR
0
0
0
0
0
r
2
r
1
r
0
d
7
d
6
d
5
d
4
d
3
d
2
d
1
d
0
r2,r1,r0: PSB 4851 register
CS
SCLK
SDR
0
0
0
1
0
r
2
r
1
r
0
SDX
d
7
d
6
d
5
d
4
d
3
d
2
d
1
d
0
r2,r1,r0: PSB 4851 register
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