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參數(shù)資料
| 型號： | PS2500AIT |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | Low-Power Direct Digital Modulation Frequency Synthesizer |
| 中文描述： | 低功耗直接數(shù)字調(diào)制頻率合成器 |
| 文件頁數(shù)： | 6/28頁 |
| 文件大小： | 184K |
| 代理商： | PS2500AIT |
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PS2500 2.2 GHz Fractional-N Frequency Synthesizer
- 6 -
Philsar Semiconductor Inc.
146 Colonnade Road S.
Nepean, Ontario, Canada
K2E 7Y1
Tel: 613-274-0922
Fax: 613-274-0915
www.philsar.com
PMP-001-DS2 V1.2
Synthesizer Register Programming
In the following equations,
Fractional-N Applications
The desired division ratio for the Main and Auxiliary Synthesizer is given by:
N
fractional
= F
VCO
/ F
div_ref
where N
fractional
must be between 37.5 and 537.5 for the auxiliary.
The value to be programmed in the
Main or Auxiliary Divider Register
is given by:
N
reg
= Round
1
[N
fractional
] - 32
When in fractional mode, allowed values for
N
reg
are from 6 to 505 inclusive.
The value to be programmed in the
Main or Auxiliary Dividend Register(s)
is given by:
dividend
= Round
[divider x (N
fractional
- N
reg
- 32)]
where the
divider
is either 1024 in 10-bit mode or 262144 in 18-bit mode. Therefore, the
dividend
is a
signed binary value either 10 or 18 bits long.
N
fractional
Desired VCO division ratio in fractional-N applications. This number is a real number
and can be interpreted as the reference frequency (F
ref
) multiplying factor such that
the resulting frequency is equal to the desired VCO frequency.
N
integer
Desired VCO division ratio in integer-N applications. This number is an integer and
can be interpreted as the reference frequency (F
ref
) multiplying factor such that the
resulting frequency is equal to the desired VCO frequency.
N
reg
9-bit unsigned input value to the divider ranging from 0 to 511(Integer-N mode) and
from 6 to 505 (Fractional-N mode)
divider
262144 when the
Σ
modulator is in 18-bit mode, 1024 when the
Σ
is in 10-bit
mode
dividend
When in 18-bit mode, 18-bit signed input value to the
Σ
modulator, ranging from
-131072 to +131071 providing 262144 steps, each of
F
div_ref
/ 2
18
(Hz).
or
when in 10-bit mode, 10-bit signed input value to the
Σ
modulator, ranging from
-512 to +511 providing 1024 steps, each of
F
div_ref
/ 2
10
Hz.
F
VCO
Desired VCO frequency (either
F
vco_main
or
F
vco_aux
).
F
div_ref
Divided reference frequency presented to the phase detector (either F
ref_main
or
F
ref_aux
).
1.
Where the
Round
function
rounds
the number to the nearest integer.
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