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參數(shù)資料
| 型號(hào)： | PQ2LXXX2MSP |
| 英文描述： | LOW POWER-LOSS VOLTAGE REGULATOR |
| 中文描述： | 低功率損耗的電壓調(diào)節(jié)器 |
| 文件頁(yè)數(shù)： | 2/3頁(yè) |
| 文件大?。?/td> | 58K |
| 代理商： | PQ2LXXX2MSP |
Low Power-Loss Voltage Regulators
PQ2Lxxx2MSP Series
I
Electrical Characteristics
I
Output Voltage Line-up
Fig.2
Test Circuit of Ripple Rejection
Load regulation
Output voltage
Line regulation
Temperature coefficient of output voltage
Ripple Rejection
Dropout voltage
ON-state voltage for control
Quiescent current
Parameter
Symbol
V
O
R
eg
L1
R
eg
L2
R
eg
I1
R
eg
I2
T
C
V
O
1
T
C
V
O
2
RR
V
no(rms)
V
i
–
o
1
V
i
–
o
2
I
q
Conditions
–
I
O
1=5mA to 200mA
I
O
2=5mA to 200mA
MIN.
Refer to the following table
55
55
3
3
0.1
0.1
60
50
0.16
0.16
250
TYP.
MAX.
Unit
V
(Unless otherwise specified, condition shall be V
IN
=
V
O
1(TYP.)
+
1.0V, I
O
1
=
0.5A, I
O
2
=
0mA, Ta=25
C)
–
–
–
–
–
–
–
–
–
–
V
IN
=V
01
(TYP.) +1V to V
01
(TYP.) +6V(MAX.9V)
, Io1=30mA
V
IN
=V
01
(TYP.) +1V to V
01
(TYP.) +6V(MAX.9V)
, Io2=30mA
I
O
1=10mA, T
j
=
–
25 to +75
C
I
O
2=10mA, T
j
=
–
25 to +75
C
Refer to Fig.2
10Hz<f<100kHz, I
O
=30mA, C
n
=0.01
μ
F
I
O
1=100mA,
5
I
O
2=100mA,
5
–
200
200
20
20
–
–
–
–
0.4
0.4
400
mV
mV
mV/
C
dB
μ
V
V
μ
A
4
4
4 In case of typical value at 3.3V ouput model.
6 In case of opening control terminal , output voltage turns off.
3
Output
voltage
PQ2L3232MSP
PQ2L3252MSP
PQ2L3182MSP
PQ2L2182MSP
Parameter
Symbol
V
O
1
V
O
2
V
O
1
V
O
2
V
O
1
V
O
2
V
O
1
V
O
2
Conditions
I
O
1=30mA, I
O
2=0mA
I
O
1=0mA, I
O
2=30mA
I
O
1=30mA, I
O
2=0mA
I
O
1=0mA, I
O
2=30mA
I
O
1=30mA, I
O
2=0mA
I
O
1=0mA, I
O
2=30mA
I
O
1=30mA, I
O
2=0mA
I
O
1=0mA, I
O
2=30mA
MIN.
3.234
2.440
3.234
2.240
3.234
1.740
2.440
1.740
TYP.
3.3
2.5
3.3
2.3
3.3
1.8
2.5
1.8
MAX.
3.366
2.560
3.366
2.360
3.366
1.860
2.560
1.860
Unit
V
(V
IN
=5.0V, T
a
=25
C)
I
q
C
IN
Co2
Co1
V
IN
10
μ
F
0.01
μ
F
4.7
μ
F
R
L
R
L
Vo1
1
μ
F
Vo2
V
A
4
2
3
5
1
A
Io1
A
Io2
V
f=400Hz (Sine wave)
ei(rms)=100mV
V
IN
=V
(TYP.)+1.0V
I
O
=10mA
RR=20 log {ei(rms)/eo(rms)}
C
IN
V
IN
10
μ
F
0.1
μ
F
ei
+
+
10
μ
F
R
L
R
L
eo
1
μ
F
eo
4
2
3
5
1
Fig.1
Test Circuit
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