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    參數(shù)資料
    型號: PPG36F-2MC4
    英文描述: Peripheral IC
    中文描述: 外圍芯片
    文件頁數(shù): 2/5頁
    文件大?。?/td> 67K
    代理商: PPG36F-2MC4
    PPG36F
    Doc #97009
    DATA DELAY DEVICES, INC.
    2
    Powered by ICminer.com Electronic-Library Service CopyRight 2003
    APPLICATION NOTES
    DEVICE TIMING
    The timing definitions and restrictions for the
    PPG36F are shown in Figure 1. The unit is
    activated by a rising edge on the TRIG input.
    After a time, T
    TO
    (called the inherent delay), the
    rising edge of the pulse appears at OUT. The
    duration of the pulse is given by the above
    equation. For the duration of the pulse, the
    device ignores subsequent triggers. Once the
    falling edge of the pulse has appeared at OUT,
    an additional time, T
    OTR
    , is required before the
    device can respond to the next trigger.
    At power-up, the state of the PPG36F is
    unknown. Consequently, after power is applied,
    the unit may not respond to input triggers for a
    time equal to the maximum pulse width, PW
    T
    .
    After this time, the unit will function properly. If
    your application requires that the device function
    immediately, issue a quick reset at power-up.
    POWER SUPPLY BYPASSING
    The PPG36F relies on a stable power supply to
    produce repeatable pulses within the stated
    tolerances. A 0.1uf capacitor from VCC to GND,
    located as close as possible to each VCC pin, is
    recommended. A wide VCC trace should
    connect all VCC pins externally, and a clean
    ground plane should be used.
    INCREMENT TOLERANCES
    Please note that the increment tolerances listed
    represent a design goal. Although most
    increments will fall within tolerance, they are not
    guaranteed throughout the address range of the
    unit. Monotonicity is, however, guaranteed over
    all addresses.
    `
    A5-A0
    T
    OAX
    T
    RTS
    T
    TW
    T
    TO
    PW
    A
    RES
    TRIG
    OUT
    OUT/
    Figure 1: Timing Diagram
    A
    i
    A
    i+1
    T
    SKEW
    T
    ATS
    T
    RO
    T
    OTR
    T
    RW
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