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參數(shù)資料
| 型號： | PPC603EFACT |
| 英文描述： | MPC603e Host Processor Fact Sheet |
| 中文描述： | MPC603e主機處理器概況 |
| 文件頁數(shù)： | 2/2頁 |
| 文件大小： | 196K |
| 代理商： | PPC603EFACT |
C ache and M M U S upport
The MPC603r microprocessor has separate 16-Kbyte, physically-addressed instruction and data caches. Both
caches are four-way set-associative. The microprocessor also contains separate memory management units
(MMUs) for instructions and data. The MMUs support 4 Petabytes (2
52
) of virtual memory and 4 Gigabytes (2
32
)
of physical memory. Access privileges and memory protection are controlled on block or page granularities. Large,
64-entry translation lookaside buffers (TLBs) provide efficient physical address translation and support for demand
virtual-memory management on both page- and variable-sized blocks.
Flex ible B us Interface
The MPC603r microprocessor has a selectable 32- or 64-bit data bus and a 32-bit address bus. Support is included
for burst, split and pipelined transactions. The interface provides snooping for data cache coherency. The micro-
processor maintains MEI coherency protocol in hardware, allowing access to system memory for additional
caching bus masters, such as DMA devices.
CPU Speeds – Internal
100 and 133 MHz
CPU Bus Dividers
x1.5, x2, x2.5, x3, x3.5, x4
MPC603r
100-133 MHz
200*, 266 and 300 MHz
Bus Interface
64-and 32-bit modes
64-and 32-bit modes
Instructions per Clock
3 (2 + Branch)
3 (2 + Branch)
L1 Cache
16-Kbyte instruction
16-Kbyte data
16-Kbyte instruction
16-Kbyte data
Typical/Maximum
Power Dissipation
4.2W/5.3W @ 133 MHz
4.0W/6.0W @ 300 MHz
Die Size
98 mm
2
42 mm
2
Package
240 CQFP, 255 CBGA
255 CBGA - all:
255 PBGA @200
Process
0.5
μ
4LM CMOS
0.29
μ
5LM CMOS
Transistors
2.6 million
2.6 million
Voltage
3.3V
3.3V i/o, 2.5V internal
SPECint95 (estimated)
3.9 @ 133 MHz
7.4 @ 300 MHz
SPECfp95 (estimated)
3.1 @133 MHz
6.1 @ 300 MHz
Other Performance
188 MIPS @ 133 MHz
423 MIPS @ 300 MHz
Execution Units
Integer, Floating-Point, Branch,
Load/Store, System Register
Integer, Floating-Point, Branch,
Load/Store, System Register
x2, x2.5, x3, x3.5, x4, x4.5,
x5, x5.5, x6
MPC603r
200-300 MHz
*see hardware specifications for operation at lower frequencies
C ontact Inform ation
■
Motorola offers user’s manuals,
application notes and sample
code for all of its processors.
In addition, local support for these
products is also provided.
This information can be found at:
http://motorola.com/smartnetworks
■
For all other inquiries about Motorola
products, please contact the Motorola
Customer Response Center at:
800-521-6274 or
http://motorola.com/semiconductors
2001 Motorola, Inc. All rights reserved. Printed in the U.S.A. Motorola and the are registered trademarks of Motorola, Inc.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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