參數(shù)資料
型號(hào)： PLUTO
廠商： Mitel Networks Corporation
英文描述： KPSE 10C 10#20 SKT PLUG
中文描述： 雙模式CDMA / AMPS二元基帶接口
文件頁(yè)數(shù)： 5/15頁(yè)
文件大?。?/td> 139K
代理商： PLUTO
5
PLUTO
Parameter
Value
Units
Conditions
Min
Typ
Max
t1
t2
t3
t4
t5
t6
t7
t8
TXCLOCK PERIOD (CDMA TX)
TXCLOCK HIGH TIME (CDMA TX)
TXCLOCK LOW TIME (CDMA TX)
TXCLOCK PHASE Delay (CDMA TX)
TXCLOCK RISE TIME (CDMA TX)
TXCLOCK FALL TIME (CDMA TX)
TXD-TXCLOCK SETUP TIME
TXCLOCK-TXD HOLD TIME
203.2
101.6
101.6
ns
ns
ns
ns
ns
ns
ns
ns
CDMA TX Figure 3
CDMA TX Figure 3
CDMA TX Figure 3
CDMA TX Figure 3, FM TX Figure 4
CDMA TX Figure 3, FM TX Figure 4
CDMA TX Figure 3, FM TX Figure 4
CDMA TX Figure 3, FM TX Figure 4
CDMA TX Figure 3, FM TX Figure 4
1.2
12
12
20
3
t11
t12
t13
t14
t15
t16
t17
t18
t19
t20
t21
t22
t23
t24
t25
t26
t27
t28
t29
t30
t31
t32
t33
t34
t35
t36
t37
t38
t39
t40
t41
t42
t43
t44
t45
TXCLOCK PERIOD (FM TX)
TXCLOCK HIGH TIME (FM TX)
TXCLOCK LOW TIME (FM TX)
CHIPx8 PERIOD
CHIPx8 HIGH TIME
CHIPx8LOW TIME
CHIPx8 RISE TIME
CHIPx8 FALL TIME
RXD Hold Time After CHIPx8
↓
RXD DELAY After CHIPx8
↓
FMCLK PERIOD
FMCLK HIGH TIME
FMCLK LOW TIME
FMCLK RISE TIME
FMCLK FALL TIME
RXFMSTB HIGH TIME
RXFMSTB -FMCLK
↓
SETUP TIME
FMCLK
↓
RXFMSTB HOLD TIME
FMCLK
↓
OUTPUT DATA DELAY
ADCENA HIGH _ CONVERSION
ADCENA HIGH TIME
ADCENA LOW TIME
ADCCLK PERIOD
ADCCLK HIGH TIME
ADCCLK LOW TIME
ADCCLK RISE TIME
ADCCLK FALL TIME
ADCDATA VALID BEFORE ADCCLK
↑
ADC DATA HOLD TIME
SCLK-SDATA setup time
SCLK-SDATA hold time
SCLK pulse width
SLATCH-SCLK setup time
SLATCH pulse width
SCLK period
2.78
1.39
1.39
101.6
50.8
50.8
μ
s
μ
s
μ
s
ns
ns
ns
ns
ns
ns
ns
μ
s
μ
s
μ
s
ns
ns
μ
s
ns
ns
ns
μ
s
ns
ns
μ
s
μ
s
μ
s
ns
ns
μ
s
ns
ns
ns
ns
ns
ns
ns
FM TX Figure 4
FM TX Figure 4
FM TX Figure 4
Figure 5
Figure 5
Figure 5
Figure 5
Figure 5
Figure 5
Figure 5
FM RX Figure 6
FM RX Figure 6
FM RX Figure 6
FM RX Figure 6
FM RX Figure 6
FM RX Figure 6
FM RX Figure 6
FM RX Figure 6
FM RX Figure 6
General purpose ADC Figure 7
General purpose ADC Figure 7
General purpose ADC Figure 7
General purpose ADC Figure 7
General purpose ADC Figure 7
General purpose ADC Figure 7
General purpose ADC Figure 7
General purpose ADC Figure 7
General purpose ADC Figure 7
General purpose ADC Figure 7
Serial Interface Figure 8
Serial Interface Figure 8
Serial Interface Figure 8
Serial Interfsce Figure 8
Serial Interface Figure 8
Serial Interface Figure 8
152.4
12
12
3
3
10
20
2.78
1.39
1.39
12
12
1
50
50
50
40
100
100
2.44
0.81
1.62
12
12
1
5
20
20
50
20
50
100
TIMING INFORMATION
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