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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PK20N512VLQ100 |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 9/75闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC ARM CORTEX MCU 512K 144-LQFP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Kinetis® Cortex-M4 Microcontroller Family |
| 妯欐簴鍖呰锛� | 1 |
| 绯诲垪锛� | Kinetis |
| 鏍稿績铏曠悊鍣細 | ARM? Cortex?-M4 |
| 鑺珨灏哄锛� | 32-浣� |
| 閫熷害锛� | 100MHz |
| 閫ｉ€氭€э細 | CAN锛孍BI/EMI锛孖²C锛孖rDA锛孲DHC锛孲PI锛孶ART/USART锛孶SB锛孶SB OTG |
| 澶栧湇瑷�(sh猫)鍌欙細 | DMA锛孖²S锛孡VD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 100 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 512KB锛�512K x 8锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 128K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.71 V ~ 3.6 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 33x16b锛孌/A 2x12b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 105°C |
| 灏佽/澶栨锛� | 144-LQFP |
| 鍖呰锛� | 鎵樼洡 |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�鐣跺墠绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�绗�72闋�绗�73闋�绗�74闋�绗�75闋�
Table 5. Power mode transition operating behaviors
Symbol
Description
Min.
Max.
Unit
Notes
tPOR
After a POR event, amount of time from the point VDD
reaches 1.71 V to execution of the first instruction
across the operating temperature range of the chip.
VDD slew rate 鈮� 5.7 kV/s
VDD slew rate < 5.7 kV/s
鈥�
300
1.7 V / (VDD
slew rate)
渭s
VLLS1 鈫� RUN
鈥�
134
渭s
VLLS2 鈫� RUN
鈥�
96
渭s
VLLS3 鈫� RUN
鈥�
96
渭s
LLS 鈫� RUN
鈥�
6.2
渭s
VLPS 鈫� RUN
鈥�
5.9
渭s
STOP 鈫� RUN
鈥�
5.9
渭s
1. Normal boot (FTFL_OPT[LPBOOT]=1)
5.2.5 Power consumption operating behaviors
Table 6. Power consumption operating behaviors
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
IDDA
Analog supply current
鈥�
See note
mA
IDD_RUN
Run mode current 鈥� all peripheral clocks
disabled, code executing from flash
@ 1.8V
@ 3.0V
鈥�
45
47
70
72
mA
IDD_RUN
Run mode current 鈥� all peripheral clocks
enabled, code executing from flash
@ 1.8V
@ 3.0V
@ 25掳C
@ 125掳C
鈥�
61
63
72
85
71
87
mA
IDD_WAIT Wait mode high frequency current at 3.0 V 鈥� all
peripheral clocks disabled
鈥�
35
鈥�
mA
IDD_WAIT Wait mode reduced frequency current at 3.0 V 鈥�
all peripheral clocks disabled
鈥�
15
鈥�
mA
IDD_VLPR Very-low-power run mode current at 3.0 V 鈥� all
peripheral clocks disabled
鈥�
N/A
鈥�
mA
Table continues on the next page...
General
K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
Freescale Semiconductor, Inc.
17
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| 1061541120 | ADPT OPT SINGLEMODE SC-ST BLUE |
| SPC5517EAMMG66 | IC MCU 32B 1.5MB FLASH 208MAPBGA |
| SPC5516EAMMG66 | IC MCU 32BIT 1MB FLASH 208MAPBGA |
| MCF51JM64VLH | IC MCU 64KB FLASH 64LQFP |
| MCF51JM64VQH | IC MCU 64KB FLASH 64QFP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PK20N512VMC100 | 鍔熻兘鎻忚堪:ARM寰帶鍒跺櫒 - MCU KINETIS 512K USB (pre-qual sample) RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 鏍稿績:ARM Cortex M4F 铏曠悊鍣ㄧ郴鍒�:STM32F373xx 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:72 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:256 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:32 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 灏佽 / 绠遍珨:LQFP-48 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PK20N512VMD100 | 鍔熻兘鎻忚堪:ARM寰帶鍒跺櫒 - MCU Kinetis 512K USB (pre-qual sample) RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 鏍稿績:ARM Cortex M4F 铏曠悊鍣ㄧ郴鍒�:STM32F373xx 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:72 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:256 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:32 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 灏佽 / 绠遍珨:LQFP-48 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PK20N512VMD100 | 鍒堕€犲晢:Freescale Semiconductor 鍔熻兘鎻忚堪:Kinetis 512K USB |
| PK20X128VLQ100 | 鍔熻兘鎻忚堪:IC ARM CORTEX MCU 128K 144-LQFP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:Kinetis 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯欐簴鍖呰:260 绯诲垪:73S12xx 鏍稿績铏曠悊鍣�:80515 鑺珨灏哄:8-浣� 閫熷害:24MHz 閫ｉ€氭€�:I²C锛屾櫤鑳藉崱锛孶ART/USART锛孶SB 澶栧湇瑷�(sh猫)鍌�:LED锛孭OR锛學DT 杓稿叆/杓稿嚭鏁�(sh霉):9 绋嬪簭瀛樺劜鍣ㄥ閲�:64KB锛�64K x 8锛� 绋嬪簭瀛樺劜鍣ㄩ鍨�:闁冨瓨 EEPROM 澶у皬:- RAM 瀹归噺:2K x 8 闆诲 - 闆绘簮 (Vcc/Vdd):2.7 V ~ 5.5 V 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒:- 鎸暕鍣ㄥ瀷:鍏�(n猫i)閮� 宸ヤ綔婧害:-40°C ~ 85°C 灏佽/澶栨:68-VFQFN 瑁搁湶鐒婄洡 鍖呰:绠′欢 |
| PK20X128VMD100 | 鍔熻兘鎻忚堪:IC ARM CORTEX MCU 128K 144-MAP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:Kinetis 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯欐簴鍖呰:260 绯诲垪:73S12xx 鏍稿績铏曠悊鍣�:80515 鑺珨灏哄:8-浣� 閫熷害:24MHz 閫ｉ€氭€�:I²C锛屾櫤鑳藉崱锛孶ART/USART锛孶SB 澶栧湇瑷�(sh猫)鍌�:LED锛孭OR锛學DT 杓稿叆/杓稿嚭鏁�(sh霉):9 绋嬪簭瀛樺劜鍣ㄥ閲�:64KB锛�64K x 8锛� 绋嬪簭瀛樺劜鍣ㄩ鍨�:闁冨瓨 EEPROM 澶у皬:- RAM 瀹归噺:2K x 8 闆诲 - 闆绘簮 (Vcc/Vdd):2.7 V ~ 5.5 V 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒:- 鎸暕鍣ㄥ瀷:鍏�(n猫i)閮� 宸ヤ綔婧害:-40°C ~ 85°C 灏佽/澶栨:68-VFQFN 瑁搁湶鐒婄洡 鍖呰:绠′欢 |
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