參數(shù)資料
型號(hào): PIC24FJ48GA004-I/PT
廠商: Microchip Technology
文件頁數(shù): 29/52頁
文件大小: 0K
描述: IC PIC MCU FLASH 48K 44-TQFP
產(chǎn)品培訓(xùn)模塊: Graphics LCD System and PIC24 Interface
Asynchronous Stimulus
特色產(chǎn)品: PIC24FJ/33FJ MCUs & dsPIC? DSCs
標(biāo)準(zhǔn)包裝: 160
系列: PIC® 24F
核心處理器: PIC
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,PMP,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 35
程序存儲(chǔ)器容量: 48KB(16K x 24)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
配用: 876-1004-ND - PIC24 BREAKOUT BOARD
DM240011-ND - KIT STARTER MPLAB FOR PIC24F MCU
AC162088-ND - HEADER MPLAB ICD2 24FJ64GA004 28
AC164335-ND - MODULE SKT FOR 10X10 PM3 44TQFP
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
2008 Microchip Technology Inc.
DS39768D-page 35
PIC24FJXXXGA0XX
FIGURE 5-3:
PROGRAMMING EXECUTIVE – PROGRAMMER COMMUNICATION PROTOCOL
5.2
Programming Executive
Commands
The programming executive command set is shown in
Table 5-1. This table contains the opcode, mnemonic,
length, time-out and description for each command.
Functional details on each command are provided in
5.2.1
COMMAND FORMAT
All programming executive commands have a general
format consisting of a 16-bit header and any required
data for the command (see Figure 5-4). The 16-bit
header consists of a 4-bit opcode field, which is used to
identify the command, followed by a 12-bit command
length field.
FIGURE 5-4:
COMMAND FORMAT
The command opcode must match one of those in the
command set. Any command that is received which
does not match the list in Table 5-1 will return a “NACK”
The command length is represented in 16-bit words
since the SPI operates in 16-bit mode. The program-
ming executive uses the command length field to
determine the number of words to read from the SPI
port. If the value of this field is incorrect, the command
will not be properly received by the programming
executive.
5.2.2
PACKED DATA FORMAT
When 24-bit instruction words are transferred across
the 16-bit SPI interface, they are packed to conserve
space using the format shown in Figure 5-5. This
format minimizes traffic over the SPI and provides the
programming executive with data that is properly
aligned for performing table write operations.
FIGURE 5-5:
PACKED INSTRUCTION
WORD FORMAT
5.2.3
PROGRAMMING EXECUTIVE
ERROR HANDLING
The
programming
executive
will
“NACK”
all
unsupported commands. Additionally, due to the
memory constraints of the programming executive, no
checking is performed on the data contained in the
programmer command. It is the responsibility of the
programmer to command the programming executive
with valid command arguments or the programming
operation may fail. Additional information on error
handling is provided in Section 5.3.1.3 “QE_Code
1
2
15 16
1
2
15 16
PGCx
PGDx
PGCx = Input
PGCx = Input (Idle)
Host Transmits
Last Command Word
PGDx = Input
PGDx = Output
P8
12
15 16
MSB X X X LSB
1
0
P20
PGCx = Input
PGDx = Output
P9
Programming Executive
Processes Command
Host Clocks Out Response
P21
15
12
11
0
Opcode
Length
Command Data First Word (if required)
Command Data Last Word (if required)
Note:
When the number of instruction words
transferred is odd, MSB2 is zero and
LSW2 can not be transmitted.
15
8 7
0
LSW1
MSB2
MSB1
LSW2
LSWx: Least Significant 16 bits of instruction word
MSBx: Most Significant Bytes of instruction word
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