參數(shù)資料
型號(hào): PIC24FJ48GA002-I/SS
廠商: Microchip Technology
文件頁(yè)數(shù): 40/52頁(yè)
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 48K 28-SSOP
產(chǎn)品培訓(xùn)模塊: Graphics LCD System and PIC24 Interface
Asynchronous Stimulus
特色產(chǎn)品: PIC24FJ/33FJ MCUs & dsPIC? DSCs
標(biāo)準(zhǔn)包裝: 47
系列: PIC® 24F
核心處理器: PIC
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,PMP,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 21
程序存儲(chǔ)器容量: 48KB(16K x 24)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 647 (CN2011-ZH PDF)
配用: DM240011-ND - KIT STARTER MPLAB FOR PIC24F MCU
AC162088-ND - HEADER MPLAB ICD2 24FJ64GA004 28
AC164338-ND - MOD SKT PIC24F/DSPIC33F 28SOIC
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
2008 Microchip Technology Inc.
DS39768D-page 45
PIC24FJXXXGA0XX
5.4.2
PROGRAMMING VERIFICATION
After
the
programming
executive
has
been
programmed to executive memory using ICSP, it must
be verified. Verification is performed by reading out the
contents of executive memory and comparing it with
the image of the programming executive stored in the
programmer.
Reading the contents of executive memory can be
performed using the same technique described in
for reading executive memory is shown in Table 5-6.
Note that in Step 2, the TBLPAG register is set to 80h,
such that executive memory may be read. The last
eight words of executive memory should be verified
with stored values of the Diagnostic and Calibration
Words to ensure accuracy.
TABLE 5-6:
READING EXECUTIVE MEMORY
Command
(Binary)
Data
(Hex)
Description
Step 1: Exit the Reset vector.
0000
000000
040200
000000
NOP
GOTO
0x200
NOP
Step 2: Initialize TBLPAG and the Read Pointer (W6) for TBLRD instruction.
0000
200800
880190
EB0300
MOV
#0x80, W0
MOV
W0, TBLPAG
CLR
W6
Step 3: Initialize the Write Pointer (W7) to point to the VISI register.
0000
207847
000000
MOV
#VISI, W7
NOP
Step 4: Read and clock out the contents of the next two locations of executive memory through the VISI register
using the REGOUT command.
0000
0001
0000
0001
0000
0001
0000
BA0B96
000000
<VISI>
000000
BADBB6
000000
BAD3D6
000000
<VISI>
000000
BA0BB6
000000
<VISI>
000000
TBLRDL
[W6], [W7]
NOP
Clock out contents of VISI register
NOP
TBLRDH.B [W6++], [W7++]
NOP
TBLRDH.B [++W6], [W7--]
NOP
Clock out contents of VISI register
NOP
TBLRDL
[W6++], [W7]
NOP
Clock out contents of VISI register
NOP
Step 5: Reset the device internal PC.
0000
040200
000000
GOTO
0x200
NOP
Step 6: Repeat Steps 4 and 5 until all desired code memory is read.
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