參數(shù)資料
型號: PIC18LF8627-I/PT
廠商: Microchip Technology
文件頁數(shù): 3/8頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 48KX16 80TQFP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 119
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,HLVD,POR,PWM,WDT
輸入/輸出數(shù): 70
程序存儲(chǔ)器容量: 96KB(48K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 3.8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 644 (CN2011-ZH PDF)
2010 Microchip Technology Inc.
DS80329B-page 3
TIMER1 MODULE
1. Asynchronous Counter
When Timer1 is started or updated, the timer
needs to see a falling edge from the external clock
source before a rising edge can increment the
counter. If writes to TMR1H and TMR1L are not
completed while the external clock pulse is still
high, Timer1 will miss counting the first clock pulse
after the update.
When using an external crystal, the pulse width
from rising to falling edge is temperature depen-
dent and may decrease with temperature. As a
result, the timer may require an additional oscilla-
tion to overflow.
Code examples are given for the affected devices:
PIC12/14/16/17 devices – Example 1 and
PIC18 devices – Example 3
Both examples include code to wait for Timer1 to
increment twice between the RTCisr and Update
labels.
In PIC18 devices, it is not possible to reliably
update Timer1 in a low-priority interrupt. A high-
priority interrupt could occur at any time and
unexpectedly delay the TMR1 update.
PIC18 devices also include Timer3 which is
functionally identical to Timer1.
Work around
Switching Timer1 to the main system oscillator
after reloading, the timer ensures the timer will see
a falling edge before switching back to the external
clock source.
Due to the time from Timer1 overflow to the reload
being application specific, wait for the timer to
increment before beginning the reload sequence.
This ensures the timer does not miss a rising edge
during reload. The timing of the clock source
changing is critical and is detailed in Example 1
EXAMPLE 1:
PIC12/14/16/17 CODE EXAMPLE FOR 1 SECOND OVERFLOW PERIOD WITH 32.786
kHZ OSCILLATOR
BTFSC
TMR1L,0
GOTO
$-1
BTFSS
TMR1L,0
GOTO
$-1
;Timer has just incremented, 31 μs before next rising edge to
;complete reload
Update:
BCF
T1CON,TMR1CS
;Select system clock for Timer1
BSF
TMR1H,7
;Timer1 high byte 0x80
BCF
T1CON,TMR1ON
;Timer1 off
BSF
T1CON,TMR1C
;Select external crystal
BSF
T1CON,TMR1ON
;Timer1 on
Critical Timing of code sequence for instructions following last write to TMR1L or TMR1H.
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