參數(shù)資料
型號： PIC18LF458T-I/L
廠商： Microchip Technology
文件頁數(shù)： 23/116頁
文件大?。?/td> 0K
描述： IC MCU FLSH 16KX16 LV CAN 44PLCC
標準包裝： 500
系列： PIC® 18F
核心處理器： PIC
芯體尺寸： 8-位
速度： 40MHz
連通性： CAN，I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復位，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 33
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量： 1.5K x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 帶卷 (TR)
PIC18FXX8
DS41159E-page 20
2006 Microchip Technology Inc.
2.6
Oscillator Switching Feature
The PIC18FXX8 devices include a feature that allows
the system clock source to be switched from the main
oscillator to an alternate low-frequency clock source.
For the PIC18FXX8 devices, this alternate clock source
is the Timer1 oscillator. If a low-frequency crystal
(32 kHz, for example) has been attached to the Timer1
oscillator pins and the Timer1 oscillator has been
enabled, the device can switch to a Low-Power Execu-
tion mode. Figure 2-6 shows a block diagram of the
system clock sources. The clock switching feature is
enabled by programming the Oscillator Switching
Enable
(OSCSEN)
bit
in
Configuration
register,
CONFIG1H, to a ‘0’. Clock switching is disabled in an
for further details of the Timer1 oscillator and
register details.
2.6.1
SYSTEM CLOCK SWITCH BIT
The system clock source switching is performed under
software control. The system clock switch bit, SCS
(OSCCON register), controls the clock switching. When
the SCS bit is ‘0’, the system clock source comes from
the main oscillator selected by the FOSC2:FOSC0
configuration bits. When the SCS bit is set, the system
clock source comes from the Timer1 oscillator. The SCS
bit is cleared on all forms of Reset.
FIGURE 2-6:
DEVICE CLOCK SOURCES
REGISTER 2-1:
OSCCON: OSCILLATOR CONTROL REGISTER
Note:
The Timer1 oscillator must be enabled to
switch the system clock source. The
Timer1 oscillator is enabled by setting the
T1OSCEN bit in the Timer1 Control regis-
ter (T1CON). If the Timer1 oscillator is not
enabled, any write to the SCS bit will be
ignored (SCS bit forced cleared) and the
main oscillator continues to be the system
clock source.
U-0
R/W-1
—
—SCS
bit 7
bit 0
bit 7-1
Unimplemented: Read as ‘0’
bit 0
SCS: System Clock Switch bit
When OSCSEN configuration bit = 0 and T1OSCEN bit is set:
1
= Switch to Timer1 oscillator/clock pin
0
= Use primary oscillator/clock input pin
When OSCSEN is clear or T1OSCEN is clear:
Bit is forced clear.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
PIC18FXX8
TOSC
4 x PLL
TT1P
TSCLK
Clock
Source
MU
X
TOSC/4
Timer 1 Oscillator
T1OSCEN
Enable
Oscillator
T1OSO
T1OSI
Clock Source Option
for Other Modules
OSC1
OSC2
Sleep
Main Oscillator
Note:
I/O pins have diode protection to VDD and VSS.
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