Power-down Base Current (IP" />
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PIC16(L)F1782/3
DS41579C-page 372
Preliminary
2011-2012 Microchip Technology Inc.
Power-down Base Current (IPD)(2)
D029
鈥�
9
18
鈥�
A
1.8
A/D Current (Note 1, Note 3), no
conversion in progress
鈥�11
22
鈥�
A3.0
D029
鈥�
12
24
鈥�
A
2.3
A/D Current (Note 1, Note 3), no
conversion in progress
鈥�
14
28
鈥�
A
3.0
鈥�
15
30
鈥�
A
5.0
D030
鈥�
TBD
鈥�
A
1.8
A/D Current (Note 1, Note 3),
conversion in progress
鈥擳BD
鈥�
A3.0
D030
鈥�
TBD
鈥�
A
2.3
A/D Current (Note 1, Note 3,
Note 4), conversion in progress
鈥�
TBD
鈥�
A
3.0
鈥�
TBD
鈥�
A
5.0
D031
鈥�
250
鈥�
A
3.0
Op Amp (High power)
鈥�280
鈥�
A3.6
D031
鈥�
230
鈥�
A
2.3
Op Amp (High power)
鈥�
250
鈥�
A
3.0
鈥�
350
鈥�
A
5.0
D032
鈥�
250
鈥�
A
1.8
Comparator, High-Power mode
鈥�300
鈥�
A3.0
D032
鈥�
280
鈥�
A
2.3
Comparator, High-Power mode
鈥�
300
鈥�
A
3.0
鈥�
310
鈥�
A
5.0
D033
鈥�
TBD
鈥�
A
3.0
PSMC (64 MHz)
鈥擳BD
鈥�
A3.6
D033
鈥�
TBD
鈥�
A
2.3
鈥�
TBD
鈥�
A
3.0
鈥�
TBD
鈥�
A
5.0
30.3
DC Characteristics: PIC16(L)F1782/3-I/E (Power-Down) (Continued)
PIC16LF1782/3
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
TA +85掳C for industrial
-40掳C
TA +125掳C for extended
PIC16F1782/3
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
TA +85掳C for industrial
-40掳C
TA +125掳C for extended
Param
No.
Device Characteristics
Min.
Typ
Max.
+85掳C
Max.
+125掳C
Units
Conditions
VDD
Note
*
These parameters are characterized but not tested.
Data in 鈥淭yp鈥� column is at 3.0V, 25掳C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Legend:
TBD = To Be Determined
Note 1:
The peripheral current is the sum of the base IDD or IPD and the additional current consumed when this peripheral is
enabled. The peripheral
current can be determined by subtracting the base IDD or IPD current from this limit. Max
values should be used when calculating total current consumption.
2:
The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with
the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD, and VREGCON = 0x03.
3:
A/D oscillator source is FRC.
4:
0.1
F capacitor on VCAP.
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