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| 型號： | MAX1714 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | High-Speed Step-Down Controller for Notebook Computers |
| 中文描述： | 高速、降壓型控制器，用于筆記本電腦 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 443K |
| 代理商： | MAX1714 |
M
High-Speed Step-Down Controller
for Notebook Computers
18
______________________________________________________________________________________
For optimal circuit reliability, choose a capacitor that
has less than 10°C temperature rise at the peak ripple
current.
Power MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability (>5A)
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
For maximum efficiency, choose a high-side MOSFET
(Q1) that has conduction losses equal to the switching
losses at the optimum battery voltage (15V). Check to
ensure that the conduction losses at
minimum
input
voltage don’t exceed the package thermal limits or
violate the overall thermal budget. Check to ensure that
conduction losses plus switching losses at the
maxi-
mum
input voltage don’t exceed the package ratings or
violate the overall thermal budget.
Choose a low-side MOSFET (Q2) that has the lowest
possible R
DS(ON)
, comes in a moderate to small pack-
age (i.e., SO-8), and is reasonably priced. Ensure that
the MAX1714 DL gate driver can drive Q2; in other
words, check that the gate isn’t pulled up by the high-
side switch turn on, due to parasitic drain-to-gate capac-
itance, causing cross-conduction problems. Switching
losses aren’t an issue for the low-side MOSFET, since it’s
a zero-voltage switched device when used in the buck
topology.
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET, the worst-case
power dissipation due to resistance occurs at minimum
battery voltage:
PD(Q1 Resistive) = (V
OUT
/ V
IN(MIN)
)
·
I
LOAD2
·
R
DS(ON)
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages. However,
the R
DS(ON)
required to stay within package power-dissi-
pation limits often limits how small the MOSFET can be.
Again, the optimum occurs when the switching (AC)
losses equal the conduction (R
DS(ON)
) losses. High-side
switching losses don’t usually become an issue until the
input is greater than approximately 15V.
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the
CV
2
F switching loss equation. If the high-side MOSFET
you’ve chosen for adequate R
DS(ON)
at low battery volt-
ages becomes extraordinarily hot when subjected to
V
IN(MAX)
, you must reconsider your choice of MOSFET.
Calculating the power dissipation in Q1 due to switching
losses is difficult, since it must allow for difficult-to-quanti-
fy factors that influence the turn-on and turn-off times.
These factors include the internal gate resistance, gate
charge, threshold voltage, source inductance, and PC
board layout characteristics. The following switching loss
calculation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably including
a sanity check using a thermocouple mounted on Q1.
where C
RSS
is the reverse transfer capacitance of Q1
and I
GATE
is the peak gate-drive source/sink current (1A
typical).
For the low-side MOSFET, Q2, the worst-case power dis-
sipation always occurs at maximum battery voltage:
PD(Q2) = (1 - V
OUT
/ V
IN(MAX)
)
·
I
LOAD2
·
R
DS(ON)
The absolute worst case for MOSFET power dissipation
occurs under heavy overloads that are greater than
I
LOAD(MAX)
but are not quite high enough to exceed the
current limit and cause the fault latch to trip. To protect
against this possibility, you must “overdesign” the circuit
to tolerate I
LOAD
= I
LIMIT(HIGH)
+ [(LIR / 2)
·
I
LOAD(MAX)
],
where I
LIMIT(HIGH)
is the maximum valley current allowed
by the current-limit circuit, including threshold tolerance
and on-resistance variation. This means that the
MOSFETs must be very well heatsinked. If short-circuit
protection without overload protection is enough, a nor-
mal I
LOAD
value can be used for calculating component
stresses.
Choose a Schottky diode D1 having a forward voltage
low enough to prevent the Q2 MOSFET body diode from
turning on during the dead time. As a general rule, a
diode having a DC current rating equal to 1/3 of the load
current is sufficient. This diode is optional, and if efficien-
cy isn’t critical it can be removed.
Application Issues
Dropout Performance
The output voltage adjust range for continuous-conduc-
tion operation is restricted by the nonadjustable 500ns
(max) minimum off-time one-shot. For best dropout per-
formance, use the slowest (200kHz) on-time setting.
When working with low input voltages, the duty-factor
limit must be calculated using worst-case values for on-
and off-times. Manufacturing tolerances and internal
propagation delays introduce an error to the TON K-fac-
tor. This error is greater at higher frequencies (Table 5).
Also, keep in mind that transient response performance
of buck regulators operated close to dropout is poor,
PD(Q1 switching)
C
V
I
RSS
IN(MAX)2
LOAD
GATE
=
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