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參數(shù)資料
| 型號(hào)： | PIC18LF1220-I/P |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP18 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-18 |
| 文件頁(yè)數(shù)： | 26/310頁(yè) |
| 文件大?。?/td> | 5377K |
| 代理商： | PIC18LF1220-I/P |
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2004 Microchip Technology Inc.
DS39605C-page 119
PIC18F1220/1320
15.5
Enhanced PWM Mode
The Enhanced PWM Mode provides additional PWM
output options for a broader range of control applica-
tions. The module is an upwardly compatible version of
the standard CCP module and offers up to four outputs,
designated P1A through P1D. Users are also able to
select the polarity of the signal (either active-high or
active-low). The module’s output mode and polarity are
configured
by
setting
the
P1M1:P1M0
and
CCP1M3CCP1M0 bits of the CCP1CON register
(CCP1CON<7:6> and CCP1CON<3:0>, respectively).
Figure 15-3 shows a simplified block diagram of PWM
operation. All control registers are double-buffered and
are loaded at the beginning of a new PWM cycle (the
period boundary when Timer2 resets) in order to prevent
glitches on any of the outputs. The exception is the PWM
Delay register, ECCP1DEL, which is loaded at either the
duty cycle boundary or the boundary period (whichever
comes first). Because of the buffering, the module waits
until the assigned timer resets instead of starting imme-
diately. This means that Enhanced PWM waveforms do
not exactly match the standard PWM waveforms, but
are instead offset by one full instruction cycle (4 TOSC).
As before, the user must manually configure the
appropriate TRIS bits for output.
15.5.1
PWM PERIOD
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
equation:
EQUATION 15-1:
PWM PERIOD
PWM frequency is defined as 1/[PWM period]. When
TMR2 is equal to PR2, the following three events occur
on the next increment cycle:
TMR2 is cleared
The CCP1 pin is set (if PWM duty cycle = 0%, the
CCP1 pin will not be set)
The PWM duty cycle is copied from CCPR1L into
CCPR1H
15.5.2
PWM DUTY CYCLE
The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available. The CCPR1L contains
the eight MSbs and the CCP1CON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPR1L:CCP1CON<5:4>. The PWM duty cycle is
calculated by the equation:
EQUATION 15-2:
PWM DUTY CYCLE
CCPR1L and CCP1CON<5:4> can be written to at any
time, but the duty cycle value is not copied into
CCPR1H until a match between PR2 and TMR2 occurs
(i.e., the period is complete). In PWM mode, CCPR1H
is a read-only register.
The CCPR1H register and a 2-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM
operation. When the CCPR1H and 2-bit latch match
TMR2, concatenated with an internal 2-bit Q clock or
two bits of the TMR2 prescaler, the CCP1 pin is
cleared. The maximum PWM resolution (bits) for a
given PWM frequency is given by the equation:
EQUATION 15-3:
PWM RESOLUTION
15.5.3
PWM OUTPUT CONFIGURATIONS
The P1M1:P1M0 bits in the CCP1CON register allow
one of four configurations:
Single Output
Half-Bridge Output
Full-Bridge Output, Forward mode
Full-Bridge Output, Reverse mode
The Single Output mode is the Standard PWM mode
discussed in Section 15.5 “Enhanced PWM Mode”.
The Half-Bridge and Full-Bridge Output modes are
covered in detail in the sections that follow.
The
general
relationship
of
the
outputs
in
all
configurations is summarized in Figure 15-4.
TABLE 15-4:
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
Note:
The Timer2 postscaler (see Section 13.0
“Timer2 Module”) is not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
PWM Period = [(PR2) + 1] 4 TOSC
(TMR2 Prescale Value)
Note:
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
PWM Duty Cycle = (CCPR1L:CCP1CON<5:4>)
TOSC (TMR2 Prescale Value)
(
)
PWM Resolution (max) =
FOSC
FPWM
log
log(2)
bits
PWM Frequency
2.44 kHz
9.77 kHz
39.06 kHz
156.25 kHz
312.50 kHz
416.67 kHz
Timer Prescaler (1, 4, 16)
16
4111
1
PR2 Value
FFh
3Fh
1Fh
17h
Maximum Resolution (bits)
10
8
7
6.58
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| PIC18LF1220ISS | 制造商:Microchip Technology Inc 功能描述: |
| PIC18LF1220T-I/ML | 功能描述:8位微控制器 -MCU 4KB 256 RAM 16I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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| PIC18LF1220T-I/SS | 功能描述:8位微控制器 -MCU 4KB 256 RAM 16I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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