VSS 9, 25, 41, 56 P 鈥� Ground re" />
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寤犲晢锛� Microchip Technology
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鏂囦欢澶�?銆�?/td> 0K
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鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� 8-bit PIC® Microcontroller Portfolio
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2009-2011 Microchip Technology Inc.
DS39960D-page 23
PIC18F87K22 FAMILY
VSS
9, 25, 41, 56
P
鈥�
Ground reference for logic and I/O pins.
VDD
26, 38, 57
P
鈥�
Positive supply for logic and I/O pins.
AVSS
20
P
鈥�
Ground reference for analog modules.
AVDD
19
P
鈥�
Positive supply for analog modules.
ENVREG
18
I
ST
Enable for on-chip voltage regulator.
VDDCORE/VCAP
VDDCORE
VCAP
10
P鈥�
Core logic power or external filter capacitor connection.
External filter capacitor connection (regulator
enabled/disabled).
TABLE 1-3:
PIC18F6XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number Pin
Type
Buffer
Type
Description
QFN/TQFP
Legend:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to VDD)
I2C= I2C/SMBus
Note 1:
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
2:
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
3:
Not available on PIC18F65K22 and PIC18F85K22 devices.
4:
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
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