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NXP Semiconductors
P89V660/662/664
80C51 with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI
NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 17 October 2011
Document identifier: P89V660_662_664
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 鈥楲egal information鈥�.
15. Contents
I2C-bus interface. . . . . . . . . . . . . . . . . . . . . . . 24
I2C-bus data register. . . . . . . . . . . . . . . . . . . . 26
I2C-bus slave address register . . . . . . . . . . . . 26
I2C-bus control register. . . . . . . . . . . . . . . . . . 26
I2C-bus status register . . . . . . . . . . . . . . . . . . 28
I2C-bus operation modes . . . . . . . . . . . . . . . . 28
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