參數(shù)資料
型號(hào): PIC18F65K90-I/MRRSL
廠商: Microchip Technology
文件頁數(shù): 81/110頁
文件大?。?/td> 0K
描述: MCU PIC 32K FLASH MEM XLP 64QFN
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 40
系列: PIC® XLP™ 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 64MHz
連通性: I²C,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LCD,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 托盤
2010 Microchip Technology Inc.
Preliminary
DS39964B-page 527
PIC18F47J53 FAMILY
31.3
DC Characteristics:PIC18F47J53 Family (Industrial)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C
TA +85°C for industrial
Param
No.
Symbol
Characteristic
Min
Max
Units
Conditions
VIL
Input Low Voltage
All I/O ports:
D030
with TTL Buffer(4)
VSS
0.15 VDD
VVDD < 3.3V
D030A
with TTL Buffer(4)
VSS
0.8
V
3.3V < VDD <
3.6V
D031
with Schmitt Trigger Buffer
VSS
0.2 VDD
V
D031A
SCLx/SDAx
0.3 VDD
VI2C enabled
D031B
SCLx/SDAx
0.8
V
SMBus enabled
D032
MCLR
VSS
0.2 VDD
V
D033
OSC1
VSS
0.3 VDD
V
HS, HSPLL modes
D033A
D034
OSC1
T1OSI
VSS
0.2 VDD
0.3
V
EC, ECPLL modes
T1OSCEN = 1
VIH
Input High Voltage
I/O Ports without 5.5V
Tolerance:
D040
with TTL Buffer(4)
0.25 VDD + 0.8V
VDD
VVDD < 3.3V
D040A
with TTL Buffer(4)
2.0
VDD
V3.3V < VDD <
3.6V
D041
with Schmitt Trigger Buffer
0.8 VDD
VDD
V
I/O Ports with 5.5V Tolerance:(5)
Dxxx
with TTL Buffer
0.25 VDD + 0.8V
5.5
V
VDD < 3.3V
DxxxA
2.0
5.5
V
3.3V
VDD 3.6V
Dxxx
with Schmitt Trigger Buffer
0.8 VDD
5.5
V
D041A
SCLx/SDAx
0.7 VDD
—V
I2C enabled
D041B
SCLx/SDAx
2.1
V
SMBus enabled; VDD > 3V
D042
MCLR
0.8 VDD
5.5
V
D043
OSC1
0.7 VDD
VDD
V
HS, HSPLL modes
D043A
D044
OSC1
T1OSI
0.8 VDD
1.6
VDD
V
EC, ECPLL modes
T1OSCEN = 1
IIL
Input Leakage Current(1,2)
D060
I/O Ports
±5
±200
nA
VSS
VPIN VDD,
Pin at high-impedance
D061
MCLR
±5
±200
nA
Vss
VPIN VDD
D062
D+/D-
±75 typical
±500
nA
Vss
VPIN VDD
D063
OSC1
±5
±200
nA
Vss
VPIN VDD
IPU
Weak Pull-up Current
D070
IPURB
PORTB, PORTD(3) and
PORTE(3) Weak Pull-up Current
80
400
AVDD = 3.3V, VPIN = VSS
Note 1:
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent
normal operating conditions. Higher leakage current may be measured at different input voltages.
2:
Negative current is defined as current sourced by the pin.
3:
Only available in 44-pin devices.
4:
When used as general purpose inputs, the RC4 and RC5 thresholds are referenced to VUSB instead of VDD.
5:
Refer to Table 10-2 for pin tolerance levels.
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