參數(shù)資料
型號: PIC18F46K80-I/P
廠商: Microchip Technology
文件頁數(shù): 52/351頁
文件大?。?/td> 0K
描述: MCU PIC 64KB FLASH 40DIP
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
特色產(chǎn)品: PIC18F46K80/66K80 eXtreme Low Power CAN MCU
標(biāo)準(zhǔn)包裝: 10
系列: PIC® XLP™ 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 64MHz
連通性: ECAN,I²C,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 35
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 3.6K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 11x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
2010-2012 Microchip Technology Inc.
DS39977F-page 145
PIC18F66K80 FAMILY
9.0
8 x 8 HARDWARE MULTIPLIER
9.1
Introduction
All PIC18 devices include an 8 x 8 hardware multiplier
as part of the ALU. The multiplier performs an unsigned
operation and yields a 16-bit result that is stored in the
product register pair, PRODH:PRODL. The multiplier’s
operation does not affect any flags in the STATUS
register.
Making multiplication a hardware operation allows it to
be completed in a single instruction cycle. This has the
advantages of higher computational throughput and
reduced code size for multiplication algorithms and
allows PIC18 devices to be used in many applications
previously reserved for digital-signal processors. A
comparison of various hardware and software multiply
operations, along with the savings in memory and
execution time, is shown in Table 9-1.
9.2
Operation
Example 9-1 shows the instruction sequence for an 8 x 8
unsigned multiplication. Only one instruction is required
when one of the arguments is already loaded in the
WREG register.
Example 9-2 shows the sequence to do an 8 x 8 signed
multiplication. To account for the sign bits of the argu-
ments, each argument’s Most Significant bit (MSb) is
tested and the appropriate subtractions are done.
EXAMPLE 9-1:
8 x 8 UNSIGNED MULTIPLY
ROUTINE
EXAMPLE 9-2:
8 x 8 SIGNED MULTIPLY
ROUTINE
TABLE 9-1:
PERFORMANCE COMPARISON FOR VARIOUS MULTIPLY OPERATIONS
MOVF
ARG1, W
;
MULWF
ARG2
; ARG1 * ARG2 ->
; PRODH:PRODL
MOVF
ARG1, W
MULWF
ARG2
; ARG1 * ARG2 ->
; PRODH:PRODL
BTFSC
ARG2, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG1
MOVF
ARG2, W
BTFSC
ARG1, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG2
Routine
Multiply Method
Program
Memory
(Words)
Cycles
(Max)
Time
@ 64 MHz
@ 48 MHz
@ 10 MHz
@ 4 MHz
8 x 8 unsigned
Without hardware multiply
13
69
4.3
s5.7 s27.6 s69 s
Hardware multiply
1
62.5 ns
83.3 ns
400 ns
1
s
8 x 8 signed
Without hardware multiply
33
91
5.6
s7.5 s36.4 s91 s
Hardware multiply
6
375 ns
500 ns
2.4
s6 s
16 x 16
unsigned
Without hardware multiply
21
242
15.1
s20.1 s96.8 s
242
s
Hardware multiply
28
1.7
s2.3 s11.2 s28 s
16 x 16 signed
Without hardware multiply
52
254
15.8
s21.2 s
101.6
s
254
s
Hardware multiply
35
40
2.5
s3.3 s16.0 s40 s
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