PIC18F45J10 FAMILY
DS39682E-page 12
2009 Microchip Technology Inc.
TABLE 1-2:
PIC18F24J10/25J10 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
SPDIP,
SOIC,
SSOP
QFN
MCLR
126
IST
Master Clear (input) or programming voltage (input).
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
OSC1/CLKI
OSC1
CLKI
96
I
—
CMOS
Oscillator crystal or external clock input.
Oscillator crystal input or external clock source input.
External clock source input. Always associated with pin
function OSC1. See related OSC2/CLKO pins.
OSC2/CLKO
OSC2
CLKO
10
7
O
—
Oscillator crystal or clock output.
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
In EC mode, OSC2 pin outputs CLKO which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
Legend:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
I
= Input
O
= Output
P
= Power
Note 1:
Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2:
Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.